ATMEGA8535-16PU Atmel, ATMEGA8535-16PU Datasheet - Page 57

IC AVR MCU 8K 16MHZ 5V 40DIP

ATMEGA8535-16PU

Manufacturer Part Number
ATMEGA8535-16PU
Description
IC AVR MCU 8K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA8535-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
SPI/TWI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
8K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8535-16PU
Manufacturer:
ATMEL
Quantity:
1 500
Part Number:
ATMEGA8535-16PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
2502G–AVR–04/05
Table 22 summarizes the function of the overriding signals. The pin and port indexes
from Figure 26 are not shown in the succeeding tables. The overriding signals are gen-
erated internally in the modules having the alternate function.
Table 22. Generic Description of Overriding Signals for Alternate Functions
The following subsections shortly describe the alternate functions for each port, and
relate the overriding signals to the alternate function. Refer to the alternate function
description for further details.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Full Name
Pull-up Override
Enable
Pull-up Override
Value
Data Direction
Override Enable
Data Direction
Override Value
Port Value
Override Enable
Port Value
Override Value
Digital Input
Enable Override
Enable
Digital Input
Enable Override
Value
Digital Input
Analog
Input/output
Description
If this signal is set, the pull-up enable is controlled by the PUOV
signal. If this signal is cleared, the pull-up is enabled when
{DDxn, PORTxn, PUD} = 0b010.
If PUOE is set, the pull-up is enabled/disabled when PUOV is
set/cleared, regardless of the setting of the DDxn, PORTxn,
and PUD Register bits.
If this signal is set, the Output Driver Enable is controlled by the
DDOV signal. If this signal is cleared, the Output driver is
enabled by the DDxn Register bit.
If DDOE is set, the Output Driver is enabled/disabled when
DDOV is set/cleared, regardless of the setting of the DDxn
Register bit.
If this signal is set and the Output Driver is enabled, the port
value is controlled by the PVOV signal. If PVOE is cleared, and
the Output Driver is enabled, the port Value is controlled by the
PORTxn Register bit.
If PVOE is set, the port value is set to PVOV, regardless of the
setting of the PORTxn Register bit.
If this bit is set, the Digital Input Enable is controlled by the
DIEOV signal. If this signal is cleared, the Digital Input Enable
is determined by MCU-state (Normal mode, sleep modes).
If DIEOE is set, the Digital Input is enabled/disabled when
DIEOV is set/cleared, regardless of the MCU state (Normal
mode, sleep modes).
This is the Digital Input to alternate functions. In the figure, the
signal is connected to the output of the schmitt trigger but
before the synchronizer. Unless the Digital Input is used as a
clock source, the module with the alternate function will use its
own synchronizer.
This is the Analog Input/Output to/from alternate functions. The
signal is connected directly to the pad, and can be used bi-
directionally.
ATmega8535(L)
57

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