PIC18F2331-E/MM Microchip Technology, PIC18F2331-E/MM Datasheet - Page 322

IC MCU FLASH 4KX16 28QFN

PIC18F2331-E/MM

Manufacturer Part Number
PIC18F2331-E/MM
Description
IC MCU FLASH 4KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2331-E/MM

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
768 B
Data Rom Size
256 B
On-chip Adc
Yes
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
5
Height
0.88 mm
Interface Type
EUSART, I2C, SPI, SSP
Length
6 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
6 mm
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PIC18F2331-E/ML
PIC18F2331-E/ML
PIC18F2331/2431/4331/4431
TBLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
DS39616D-page 322
Table Write
[ label ]
None
if TBLWT*,
(TABLAT)  Holding Register,
TBLPTR – No Change;
if TBLWT*+,
(TABLAT)  Holding Register,
(TBLPTR) + 1  TBLPTR;
if TBLWT*-,
(TABLAT)  Holding Register,
(TBLPTR) – 1  TBLPTR;
if TBLWT+*,
(TBLPTR) + 1  TBLPTR,
(TABLAT)  Holding Register
None
This instruction uses the 3 LSBs of
TBLPTR to determine which of the
8 holding registers the TABLAT is written
to. The holding registers are used to
program the contents of Program Memory
(P.M.). (Refer to
gram Memory”
programming Flash memory.)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory.
TBLPTR has a 2-Mbyte address range.
The LSb of the TBLPTR selects which
byte of the program memory location to
access.
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
TBLPTR[0] = 0: Least Significant Byte
TBLPTR[0] = 1: Most Significant Byte
0000
TBLWT ( *; *+; *-; +*)
0000
Section 8.0 “Flash Pro-
for additional details on
of Program Memory
Word
of Program Memory
Word
0000
nn = 0 *
11nn
=1 *+
=2 *-
=3 +*
TBLWT Table Write (Continued)
Words:
Cycles: 2
Q Cycle Activity:
Example 1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
1
TABLAT
TBLPTR
HOLDING REGISTER
(0x00A356)
TABLAT
TBLPTR
HOLDING REGISTER
(0x00A356)
TABLAT
TBLPTR
HOLDING REGISTER
(0x01389A)
HOLDING REGISTER
(0x01389B)
TABLAT
TBLPTR
HOLDING REGISTER
(0x01389A)
HOLDING REGISTER
(0x01389B)
operation
Decode
Q1
No
TBLWT
TBLWT
operation
operation
TABLAT)
 2010 Microchip Technology Inc.
(Read
Q2
No
No
*+;
+*;
=
=
=
=
=
=
=
=
=
=
=
=
=
=
operation
operation
0x55
0x00A356
0xFF
0x55
0x00A357
0x55
0x34
0x01389A
0xFF
0xFF
0x34
0x01389B
0xFF
0x34
Q3
No
No
Register )
operation
operation
(Write to
Holding
Q4
No
No

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