PIC18F2331-E/MM Microchip Technology, PIC18F2331-E/MM Datasheet - Page 268

• Manufacturer Part Number: PIC18F2331-E/MM
• Description: IC MCU FLASH 4KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2331-E/MM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-QFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 768 B
• Data Rom Size: 256 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 5
• Height: 0.88 mm
• Interface Type: EUSART, I2C, SPI, SSP
• Length: 6 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V, 5.8 V
• Supply Voltage (min): 3.9 V, 4.2 V
• Width: 6 mm
• For Use With: I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PIC18F2331-E/ML; PIC18F2331-E/ML

PIC18F2331/2431/4331/4431
REGISTER 23-5:
DS39616D-page 268
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
MCLRE
R/P-1
(1)
Unimplemented in PIC18F2331/2431 devices; maintain this bit set.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin is enabled; RE3 input pin is disabled
0 = RE3 input pin is enabled; MCLR is disabled
Unimplemented: Read as ‘0’
EXCLKMX: TMR0/T5CKI External Clock MUX bit
1 = TMR0/T5CKI external clock input is multiplexed with RC3
0 = TMR0/T5CKI external clock input is multiplexed with RD0
PWM4MX: PWM4 MUX bit
1 = PWM4 output is multiplexed with RB5
0 = PWM4 output is multiplexed with RD5
SSPMX: SSP I/O MUX bit
1 = SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output
0 = SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output
Unimplemented: Read as ‘0’
FLTAMX: FLTA MUX bit
1 = FLTA input is multiplexed with RC1
0 = FLTA input is multiplexed with RD4
is multiplexed with RC7.
is multiplexed with RD1.
—
U
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
P = Programmable bit
—
U
(1)
(1)
(1)
EXCLKMX
(1)
R/P-1
(1)
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
PWM4MX
R/P-1
(1)
(1)
SSPMX
R/P-1
(1)
 2010 Microchip Technology Inc.
—
U
FLTAMX
R/P-1
bit 0
(1)