PIC18F87J11T-I/PT Microchip Technology, PIC18F87J11T-I/PT Datasheet - Page 78

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PIC18F87J11T-I/PT

Manufacturer Part Number
PIC18F87J11T-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F87J11T-I/PT

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Type
FLASH
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
68
Ram Memory Size
3930Byte
Cpu Speed
48MHz
No. Of Timers
5
No. Of Pwm
RoHS Compliant
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 15 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18F87J11T-I/PTTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87J11T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F87J11 FAMILY
TABLE 5-5:
DS39778D-page 78
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
REFOCON
CM1CON
CM2CON
RCON
TMR1H
ODCON1
TMR1L
ODCON2
T1CON
ODCON3
TMR2
PADCFG1
PR2
MEMCON
T2CON
SSP1BUF
SSP1ADD/
SSP1MSK
SSP1STAT
SSP1CON1
SSP1CON2
ADRESH
ADRESL
ADCON0
ANCON1
ADCON1
ANCON0
WDTCON
Legend:
Note
File Name
(2)
(2)
/
(2)
(2)
1:
2:
3:
4:
5:
6:
7:
8:
9:
(2)
/
(2)
(3)
(2)
(3)
(3)
/
(3)
(3)
(2)
/
(3,7)
/
(3)
(5)
(3)
/
/
/
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Bold indicates shared access SFRs.
Bit 21 of the PC is only available in Serial Programming modes.
Default (legacy) SFR at this address, available when WDTCON<4> = 0.
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP modules are operating in I
“Address Masking Modes” for details
These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 80-pin devices.
These bits are only available in select oscillator modes (FOSC2 Configuration bit = 0); otherwise, they are unimplemented.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the physical registers and addresses, but have different
functions determined by the module’s operating mode. See Section 11.1.2 “Data Registers” for more information.
Indirect Data Memory Address Pointer 2 Low Byte
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP1 Receive Buffer/Transmit Register
MSSP1 Address Register (I
A/D Result Register High Byte
A/D Result Register Low Byte
TMR0ON
REGSLP
PCFG15
VCFG1
PCFG7
IDLEN
ROON
EDBIS
WCOL
GCEN
GCEN
MSK7
ADFM
RD16
CON
CON
IPEN
Bit 7
SMP
REGISTER FILE SUMMARY (PIC18F87J11 FAMILY) (CONTINUED)
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0
ACKSTAT
ACKSTAT
LVDSTAT
PCFG14
T1RUN
SSPOV
VCFG0
ADCAL
PCFG6
T08BIT
IRCF2
MSK6
Bit 6
COE
COE
CKE
2
ADMSK5
C™ Slave mode), MSSP1 Baud Rate Reload Register (I
T1CKPS1
ROSSLP
PCFG13
SSPEN
ACKDT
ACQT2
WAIT1
IRCF1
CPOL
CPOL
MSK5
CHS3
T0CS
Bit 5
D/A
CM
(6)
ADMSK4
T1CKPS0
CCP5OD
EVPOL1
EVPOL1
PCFG12
ACKEN
ADSHR
ROSEL
ACQT1
PCFG4
WAIT0
IRCF0
MSK4
CHS2
T0SE
Bit 4
CKP
RI
N
P
(6)
Indirect Data Memory Address Pointer 2 High Byte
ADMSK3
T1OSCEN
CCP4OD
EVPOL0
EVPOL0
OSTS
RODIV3
PCFG11
SSPM3
ACQT0
PCFG3
RCEN
MSK3
CHS1
Bit 3
PSA
OV
TO
S
(4)
(6)
ADMSK2
ECCP3OD
TMR2ON
T1SYNC
PCFG10
RODIV2
SSPM2
ADCS2
PCFG2
T0PS2
CREF
CREF
MSK2
CHS0
Bit 2
PEN
R/W
PD
Z
(6)
ADMSK1
ECCP2OD
GO/DONE
T2CKPS1
TMR1CS
RODIV1
SPI2OD
2
SSPM1
PCFG9
ADCS1
PCFG1
T0PS1
RSEN/
U2OD
C Master mode)
SCS1
CCH1
CCH1
MSK1
WM1
2
Bit 1
POR
DC
UA
C™ Slave mode. See Section 19.4.3.2
(6)
© 2009 Microchip Technology Inc.
ECCP1OD ---0 0000
T2CKPS0
TMR1ON
SWDTEN
PMPTTL
RODIV0
SPI1OD
SSPM0
PCFG8
ADCS0
PCFG0
T0PS0
U1OD
ADON
SCS0
CCH0
CCH0
MSK0
WM0
Bit 0
BOR
SEN
SEN
BF
C
---- xxxx
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0110 q100
0-00 0000
0001 1111
0001 1111
0-11 1100
xxxx xxxx
xxxx xxxx
---- --00
0000 0000
---- --00
0000 0000
---- ---0
1111 1111
0-00 --00
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
00-0 0000
0x-0 ---0
POR, BOR
Value on
58, 224,
58, 224,
58, 225,
58, 236,
58, 181
58, 181
58, 180
58, 304
58, 304
58, 184
58, 131
58, 184
58, 131
58, 184
58, 131
58, 189
58, 132
58, 189
58, 100
58, 189
58, 233
58, 240
59, 293
59, 293
59, 293
59, 295
59, 294
59, 295
59, 323
Details
56, 58,
58, 84
58, 84
58, 82
58, 34
58, 41
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