PIC18F87J11T-I/PT Microchip Technology, PIC18F87J11T-I/PT Datasheet - Page 207

• Manufacturer Part Number: PIC18F87J11T-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F87J11T-I/PTTR

18.1.3
Only the ECCP2 module has four dedicated output pins
that are available for use. Assuming that the I/O ports
or other multiplexed functions on those pins are not
needed, they may be used whenever needed without
interfering with any other CCP module.
ECCP1 and ECCP3, on the other hand, only have
three dedicated output pins: ECCPx/PxA, PxB and
PxC. Whenever these modules are configured for
Quad PWM mode, the pin normally used for CCP4 or
CCP5 becomes the PxD output pins for ECCP3 and
ECCP1, respectively. The CCP4 and CCP5 modules
remain functional but their outputs are overridden.
18.1.4
Like the standard CCP modules, the ECCP modules
can utilize Timers 1, 2, 3 or 4, depending on the mode
selected. Timer1 and Timer3 are available for modules
in Capture or Compare modes, while Timer2 and
Timer4 are available for modules in PWM mode.
Additional details on timer resources are provided in
Section 17.1.1
Resources”.
TABLE 18-1:
© 2009 Microchip Technology Inc.
Compatible CCP
Dual PWM
Quad PWM
Compatible CCP
Dual PWM
Quad PWM
Compatible CCP
Compatible CCP
Dual PWM
Quad PWM
Legend: x = Don’t care, N/A = Not Available. Shaded cells indicate pin assignments not used by ECCP1 in a given mode.
Note 1:
ECCP Mode
PIC18F8XJ1X Devices, ECCPMX = 1, Extended Microcontroller mode, 16-Bit or 20-Bit Address Width:
With ECCP1 in Quad PWM mode, CCP5’s output is overridden by P1D; otherwise, CCP5 is fully operational.
USE OF CCP4 AND CCP5 WITH
ECCP1 AND ECCP3
ECCP MODULES AND TIMER
RESOURCES
(1)
(1)
(1)
Microcontroller mode or Extended Microcontroller mode, 12-Bit Address Width:
PIN CONFIGURATIONS FOR ECCP1
“CCP
Configuration
00xx 11xx
10xx 11xx
x1xx 11xx
00xx 11xx
10xx 11xx
x1xx 11xx
00xx 11xx
00xx 11xx
10xx 11xx
x1xx 11xx
CCP1CON
PIC18F8XJ1X Devices, ECCPMX = 0, Microcontroller mode:
Modules
ECCP1
ECCP1
ECCP1
ECCP1
RC2
P1A
P1A
P1A
P1A
P1A
P1A
PIC18F8XJ1X Devices, ECCPMX = 1,
and
All PIC18F6XJ1X Devices:
Timer
RE6/AD14
RE6/AD14
RE6/AD14
RE6/AD14
RE6/AD14
RE6
RE6
P1B
P1B
P1B
P1B
PIC18F87J11 FAMILY
18.1.5
When operating in compare or standard PWM modes,
the drivers for the ECCP pins can be optionally
configured as open-drain outputs. This feature allows
the voltage level on the pin to be pulled to a higher level
through an external pull-up resistor, and allows the
output to communicate with external circuits without the
need for additional level shifters. For more information,
see Section 10.1.4 “Open-Drain Outputs”
The open-drain output option is controlled by the bits in
the ODCON1 register. Setting the appropriate bit
configures the pin for the corresponding module for
open-drain operation. The ODCON1 memory shares
the same address space as of TMR1H. The ODCON1
register can be accessed by setting the ADSHR bit in
the WDTCON register (WDTCON<4>).
RE5/AD13
RE5/AD13
RE5/AD13
RE5/AD13
RE5/AD13
RE5/AD13
RE5
RE5
RE5
P1C
P1C
OPEN-DRAIN OUTPUT OPTION
RG4/CCP5
RG4/CCP5
RG4/CCP5
RG4/CCP5
RG4/CCP5
RG4/CCP5
RG4/CCP5
RG4
P1D
P1D
P1D
RH7/AN15
RH7/AN15
RH7/AN15
RH7/AN15
RH7/AN15
RH7
P1B
P1B
N/A
N/A
N/A
DS39778D-page 207
RH6/AN14
RH6/AN14
RH6/AN14
RH6/AN14
RH6/AN14
RH6/AN14
RH6
P1C
N/A
N/A
N/A