PIC18F87J11T-I/PT Microchip Technology, PIC18F87J11T-I/PT Datasheet - Page 407

• Manufacturer Part Number: PIC18F87J11T-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F87J11T-I/PTTR

FIGURE 27-8:
TABLE 27-12: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
© 2009 Microchip Technology Inc.
Param.
30
31
32
33
34
38
Note 1:
No.
Note:
Watchdog
Oscillator
Time-out
Time-out
I/O pins
Internal
Internal
PWRT
MCLR
Reset
Reset
Timer
POR
T
T
T
T
T
T
Symbol
V
OST
CSD
MC
WDT
PWRT
IOZ
DD
To ensure device reset, MCLR must be low for at least 2 T
Refer to Figure 27-3 for load conditions.
L
AND BROWN-OUT RESET REQUIREMENTS
MCLR Pulse Width (low)
Watchdog Timer Time-out Period
(no postscaler)
Oscillator Start-up Timer Period
Power-up Timer Period
I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
CPU Start-up Time
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
33
Characteristic
32
1024 T
45.8
Min
3.4
—
—
2
PIC18F87J11 FAMILY
OSC
CY
34
or 400 µs, whichever is lower.
65.5
30
Typ
200
4.0
—
—
2
1024 T
Max
85.2
4.6
—
—
—
OSC
31
Units
T
ms
ms
—
μs
μs
CY
(Note 1)
T
OSC
DS39778D-page 407
34
Conditions
= OSC1 period