PIC18F87J11T-I/PT Microchip Technology, PIC18F87J11T-I/PT Datasheet - Page 324

• Manufacturer Part Number: PIC18F87J11T-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F87J11T-I/PTTR

PIC18F87J11 FAMILY
REGISTER 24-9:
TABLE 24-3:
DS39778D-page 324
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
Note 1:
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
REGSLP
Name
R/W-0
This bit has no effect if the Configuration bit, WDTEN, is enabled.
REGSLP LVDSTAT
REGSLP: Voltage Regulator Low-Power Operation Enable bit
1 = On-chip regulator enters low-power operation when device enters Sleep mode
0 = On-chip regulator is active, even in Sleep mode
LVDSTAT: LVD Status bit
1 = V
0 = V
Unimplemented: Read as ‘0’
ADSHR: Shared Address SFR Select bit
For details of bit operation, see Register 5-3.
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
IPEN
Bit 7
LVDSTAT
SUMMARY OF WATCHDOG TIMER REGISTERS
R-x
DDCORE
DDCORE
WDTCON: WATCHDOG TIMER CONTROL REGISTER
Bit 6
—
> 2.45V
< 2.45V
W = Writable bit
‘1’ = Bit is set
U-0
—
Bit 5
CM
—
ADSHR
ADSHR
R/W-0
Bit 4
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Bit 3
TO
—
U-0
—
Bit 2
PD
—
(1)
U-0
—
Bit 1
POR
—
© 2009 Microchip Technology Inc.
x = Bit is unknown
SWDTEN
U-0
Bit 0
BOR
—
Reset Values
SWDTEN
on Page:
U-0
58
59
bit 0
(1)