PIC18F87J11T-I/PT Microchip Technology, PIC18F87J11T-I/PT Datasheet - Page 161

• Manufacturer Part Number: PIC18F87J11T-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F87J11T-I/PTTR

11.1.4
By default, the PMP and the external memory bus
multiplex some of their signals to the same I/O pins on
PORTD and PORTE. It is possible that some applica-
tions may require the PMP signals to be located
elsewhere. For these instances, the 80-pin devices can
be configured to multiplex the PMP to different I/O
ports. PMP configuration is determined by the PMPMX
Configuration bit setting; by default, the PMP and EMB
modules share PORTD and PORTE. The optional pin
configuration is shown in Table 11-1.
TABLE 11-1:
FIGURE 11-2:
© 2009 Microchip Technology Inc.
PMP Function
PMWR
PMRD
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMBE
PMP MULTIPLEXING OPTIONS
(80-PIN DEVICES)
Master
PMD<7:0>
PMP PIN MULTIPLEXING FOR
80-PIN DEVICES
PMWR
PMRD
PMCS
PMPMX = 1
PORTD<0>
PORTD<1>
PORTD<2>
PORTD<3>
PORTD<4>
PORTD<5>
PORTD<6>
PORTD<7>
PORTE<2>
PORTE<1>
PORTE<0>
LEGACY PARALLEL SLAVE PORT EXAMPLE
Pin Assignment
PMPMX = 0
PORTH<4>
PORTH<3>
PORTH<2>
PORTH<5>
PORTH<7>
PORTH<6>
PORTF<7>
PORTF<6>
PORTF<5>
PORTA<5>
PORTA<4>
PMD<7:0>
PMCS1
PMRD
PMWR
PIC18F87J11 FAMILY
11.2
The primary mode of operation for the module is con-
figured using the MODE1:MODE0 bits in the
PMMODEH register. The setting affects whether the
module acts as a slave or a master and it determines
the usage of the control pins.
11.2.1
In
PMPEN = 1), the module is configured as a Parallel
Slave Port with the associated enabled module pins
dedicated to the module. In this mode, an external
device, such as another microcontroller or micropro-
cessor, can asynchronously read and write data using
the 8-bit data bus (PMD<7:0>), the read (PMRD), write
(PMWR) and chip select (PMCS1) inputs. It acts as a
slave on the bus and responds to the read/write control
signals.
Figure 11-2 shows the connection of the Parallel Slave
Port. When chip select is active and a write strobe
occurs (PMCS = 1 and PMWR = 1), the data from
PMD<7:0> is captured into the PMDIN1L register.
PIC18 Slave
Legacy
Slave Port Modes
LEGACY MODE (PSP)
mode
Address Bus
Data Bus
Control Lines
(PMMODEH<1:0> = 00
DS39778D-page 161
and