ATMEGA16A-AUR Atmel, ATMEGA16A-AUR Datasheet - Page 32

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ATMEGA16A-AUR

Manufacturer Part Number
ATMEGA16A-AUR
Description
MCU AVR 16KB FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA16A-AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9. Power Management and Sleep Modes
9.1
9.2
32
Overview
Sleep Modes
ATmega16A
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
Figure 8-1 on page 24
bution. The figure is helpful in selecting an appropriate sleep mode.
different sleep modes and their wake-up sources.
Table 9-1.
Notes:
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register
select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or
Extended Standby) will be activated by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a Reset occurs during sleep
mode, the MCU wakes up and executes from the Reset Vector.
Sleep Mode
Idle
ADC NRM
Power Down
Power Save
Standby
Extended
Standby
1. External Crystal or resonator selected as clock source.
2. If AS
3. Only INT2 or level interrupt INT1 and INT0.
(1)
(1)
Active Clock Domains and Wake Up Sources in the Different Sleep Modes
2
bit in ASSR is set.
Active Clock domains
presents the different clock systems in the ATmega16A, and their distri-
X
X
X
X
X
X
X
(2)
(2)
X
X
X
X
Oscillators
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
Table 9-2
Wake-up Sources
X
X
X
X
X
X
Table 9-1
X
X
X
X
for a summary.
(2)
(2)
8154B–AVR–07/09
X
X
shows the
X
X
X

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