PIC16F1934-E/ML Microchip Technology, PIC16F1934-E/ML Datasheet - Page 94

• Manufacturer Part Number: PIC16F1934-E/ML
• Description: IC PIC MCU FLASH 256KX7 44-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1934-E/ML

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 44-QFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART/MI2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F193X/LF193X
6.3.4
Each PORTB pin is multiplexed with other functions. The
pins, their combined functions and their output priorities
are briefly described here. For additional information,
refer to the appropriate section in this data sheet.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the lowest number in
the following lists.
RB0
1.
2.
3.
RB1
1.
2.
RB2
1.
2.
TABLE 6-2:
DS41364A-page 92
ADCON0
ANSELB
APFCON
CCPxCON
CPSCON0
CPSCON1
INTCON
IOCBP
IOCBN
IOCBF
LATB
LCDCON
LCDSE0
LCDSE1
OPTION_REG
PORTB
T1GCON
TRISB
WPUB
Legend:
SEG0 (LCD)
CCP4, 28-pin only
RB0
P1C (ECCP1), 28-pin only
RB1
P1B (ECCP1), 28-pin only
RB2
Name
PORTB FUNCTIONS AND OUTPUT
PRIORITIES
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
TMR1GE
IOCBP7
IOCBN7
IOCBF7
WPUEN
CPSON
TRISB7
WPUB7
LCDEN
LATB7
PxM1
SE15
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
RB7
SE7
GIE
—
—
—
—
CCP3SEL
T1GPOL
INTEDG
IOCBP6
IOCBN6
IOCBF6
TRISB6
WPUB6
SLPEN
LATB6
CHS4
PxM0
SE14
PEIE
Bit 6
SE6
RB6
—
—
—
TMR0CS
T1GSEL
TMR0IE
IOCBP5
IOCBN5
IOCBF5
TRISB5
WPUB5
T1GTM
ANSB5
DCxB1
WERR
LATB5
CHS3
SE13
Bit 5
SE5
RB5
—
—
TMR0SE
T1GSPM
P2BSEL
IOCBN4
IOCBP4
IOCBF4
TRISB4
WPUB4
ANSB4
DCxB0
LATB4
Preliminary
CHS2
SE12
INTE
Bit 4
SE4
RB4
—
—
—
T1GGO/DONE
SRNQSEL
CPSRNG1
CCPxM3
CPSCH3
IOCBN3
IOCBP3
IOCBF3
WPUB3
TRISB3
ANSB3
RB3
1.
2.
RB4
1.
2.
3.
RB5
1.
2.
3.
4.
RB6
1.
2.
3.
4.
RB7
1.
2.
3.
4.
LATB3
CHS1
IOCIE
SE11
Bit 3
CS1
SE3
PSA
RB3
CCP2/P2A
RB3
COM0
P1D, 28-pin only
RB4
COM1
P2B, 28-pin only
P3A
RB5
ICSPCLK (Programming)
ICDCLK (enabled by Configuration Word)
SEG14 (LCD)
RB6
ICSPDAT (Programming)
ICDDAT (enabled by Configuration Word)
SEG13 (LCD)
RB7
CPSRNG0
C2OUTSEL
CPSCH2
CCPxM2
IOCBN2
T1GVAL
TMR0IF
IOCBP2
IOCBF2
TRISB2
WPUB2
ANSB2
LATB2
CHS0
SE10
Bit 2
CS0
RB2
SE2
PS2
GO/DONE
CPSOUT
CCPxM1
CPSCH1
T1GSS1
IOCBN1
© 2008 Microchip Technology Inc.
IOCBP1
IOCBF1
WPUB1
TRISB1
ANSB1
SSSEL
LMUX1
LATB1
Bit 1
INTF
SE1
SE9
PS1
RB1
CCP2SEL
CCPxM0
CPSCH0
IOCBN0
T1GSS0
IOCBP0
IOCBF0
WPUB0
TRISB0
ANSB0
LMUX0
T0XCS
LATB0
ADON
IOCIF
Bit 0
SE0
SE8
PS0
RB0
Register
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