PIC16F1934-E/ML Microchip Technology, PIC16F1934-E/ML Datasheet - Page 62

• Manufacturer Part Number: PIC16F1934-E/ML
• Description: IC PIC MCU FLASH 256KX7 44-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1934-E/ML

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 44-QFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART/MI2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F193X/LF193X
3.4.2
The WDTE<1:0> bits are located in the Configuration
Word Register 1. When set to ‘11’, the WDT runs
continuously. When entering Sleep the WDT is always
cleared. When set to ‘10’, the WDT is enabled while
running, and disabled during Sleep. When ‘01’ the
WDT is under control of the SWDTEN bit, and when
‘00’ the WDT is always disabled.
The WDTCON register contains the SWDTEN bit and
WDTPS<4:0> bits. When the WDTE<1:0> bits in the
Configuration Word 1 register are anything but ‘01’, the
SWDTEN bit has no effect. When WDTE = 01, the
SWDTEN bit can be used to enable and disable the
WDT. Setting the bit will enable the WDT and clearing
the bit will disable the WDT.
The WDTPS<4:0> bits control the prescaler. See
Register 3-1. The Reset value of WDTCON gives a
nominal WDT interval of ~2s. Upon Reset, the
SWDTEN value will leave the WDT disabled if
WDTE<1:0> is ‘01’ in the Configuration Word. The
prescaler will always be cleared on a Reset.
FIGURE 3-3:
TABLE 3-3:
DS41364A-page 60
WDTE<1:0> = 00
WDTE<1:0> = 01 and SWDTEN = 0
WDTE<1:0> = 10 and enter Sleep
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Change INTOSC divider (IRCF bits)
WDTE<1:0> = 00
WDTE<1:0> = 01
WDTE<1:0> = 11
WDTE<1:0> = 10
WDT CONTROL
SWDTEN
Sleep
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
Conditions
Preliminary
LFINTOSC
23-bit Programmable
WDTPS<4:0>
Prescaler WDT
Cleared until the end of OST
© 2008 Microchip Technology Inc.
Unaffected
Cleared
WDT
WDT Time-out