AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 190
AT90PWM1-16MU
Manufacturer Part Number
AT90PWM1-16MU
Description
IC AVR PWM 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM1-16SU.pdf
(297 pages)
Specifications of AT90PWM1-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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19.6.3
19.6.4
190
AT90PWM1
Offset Compensation Schemes
ADC Accuracy Definitions
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by shortening both differential inputs using the AMPxIS bit with both inputs unconnected.
(See “Amplifier 0 Control and Status register – AMP0CSR” on page 202.
can be then subtracted in software from the measurement results. Using this kind of software
based offset correction, offset on any channel can be reduced below one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
•
Figure 19-10. Offset Error
•
Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
(at 0.5 LSB). Ideal value: 0 LSB.
Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last
transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum).
Ideal value: 0 LSB
Output Code
Offset
Error
V
REF
Input Voltage
n
-1.
). This offset residue
Ideal ADC
Actual ADC
REF
4378C–AVR–09/08
in 2
n
steps
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