AT90PWM1-16MU Atmel, AT90PWM1-16MU Datasheet - Page 97
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AT90PWM1-16MU
Manufacturer Part Number
AT90PWM1-16MU
Description
IC AVR PWM 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM1-16SU.pdf
(297 pages)
Specifications of AT90PWM1-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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15.1.1
4378C–AVR–09/08
Registers
Figure 15-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnx), and Input Capture Register
(ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-bit
registers. These procedures are described in the section
98. The Timer/Counter Control Registers (TCCRnx) are 8-bit registers and have no CPU access
restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFRn). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSKn). TIFRn and TIMSKn are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCRnx) are compared with the Timer/Counter
value at all time. The result of the compare can be used by the Waveform Generator to generate
a PWM or variable frequency output on the Output Compare pin (OCnx).
Units” on page 104.
which can be used to generate an Output Compare interrupt request.
1. Refer to
Table on page 4
Timer/Counter
The compare match event will also set the Compare Match Flag (OCFnx)
TCCRnA
OCRnA
OCRnB
TCNTn
ICRn
=
=
Direction
Count
Clear
for Timer/Counter1 pin placement and description.
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(1)
clk
Detector
Edge
=
Tn
0
“Accessing 16-bit Registers” on page
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
See “Output Compare
AT90PWM1
ICPSEL1
0
1
ICPnA
ICPnB
T
OCnA
OCnB
n
Tn
).
97
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