DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 326
DF2398F20V
Manufacturer Part Number
DF2398F20V
Description
IC H8S/2300 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398F20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.6.3
Port 5 pins also function as SCI I/O pins (TxD2, RxD2, and SCK2), and the A/D converter input pin (ADTRG). Port 5 pin
functions are shown in table 9-10.
Table 9-10 Port 5 Pin Functions
Rev.6.00 Oct.28.2004 page 296 of 1016
REJ09B0138-0600H
Pin Functions
Pin
P5
P5
P5
P5
3
2
1
0
/ADTRG
/SCK2
/RxD2
/TxD2
Selection Method and Pin Functions
The pin function is switched as shown below according to the combination of
bits TRGS1 and TRGS0 in the A/D converter ADCR, and bit P53DDR.
Note: * ADTRG input when TRGS0 = TRGS1 = 1.
The pin function is switched as shown below according to the combination of
bit C/A in the SCI2 SMR, bits CKE0 and CKE1 in SCR, and bit P52DDR.
The pin function is switched as shown below according to the combination of
bit RE in the SCI2 SCR, and bit P51DDR.
The pin function is switched as shown below according to the combination of
bit TE in the SCI2 SCR, and bit P50DDR.
P53DDR
Pin function
CKE1
C/A
CKE0
P52DDR
Pin function
RE
P51DDR
Pin function
TE
P50DDR
Pin function
input pin
P5
P5
P5
0
1
0
2
input pin
input pin
P5
0
0
0
3
input pin
output pin
0
P5
0
1
2
0
0
ADTRG input pin*
P5
P5
0
output pin
1
0
output pin
output pin
SCK2
—
1
1
1
output pin
P5
SCK2
3
—
—
1
TxD2 output pin
output pin
RxD2 input pin
1
—
—
1
1
input pin
SCK2
—
—
—
1
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