DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 486
DF2398F20V
Manufacturer Part Number
DF2398F20V
Description
IC H8S/2300 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398F20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Quantity
Price
Company:
Part Number:
DF2398F20V
Manufacturer:
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Quantity:
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Company:
Part Number:
DF2398F20V
Manufacturer:
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Quantity:
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13.2
13.2.1
TCNT is an 8-bit readable/writable*
When the TME bit is set to 1 in TCSR, TCNT starts counting pulses generated from the internal clock source selected by
bits CKS2 to CKS0 in TCSR. When the count overflows (changes from H'FF to H'00), either the watchdog timer overflow
signal (WDTOVF)*
in TCSR.
TCNT is initialized to H'00 by a reset, in hardware standby mode, or when the TME bit is cleared to 0. It is not initialized
in software standby mode.
Notes: 1. TCNT is write-protected by a password to prevent accidental overwriting. For details see section 13.2.4,
13.2.2
Note: * Can only be written with 0 for flag clearing.
TCSR is an 8-bit readable/writable* register. Its functions include selecting the clock source to be input to TCNT, and the
timer mode.
TCR is initialized to H'18 by a reset and in hardware standby mode. It is not initialized in software standby mode.
Note: * TCSR is write-protected by a password to prevent accidental overwriting. For details see section 13.2.4, Notes on
Bit 7—Overflow Flag (OVF): Indicates that TCNT has overflowed from H'FF to H'00, when in interval timer mode. This
flag cannot be set during watchdog timer operation.
Bit 7
OVF
0
1
Rev.6.00 Oct.28.2004 page 456 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Bit
Initial value :
R/W
2. The WDTOVF pin function is not available in the F-ZTAT version, the H8S/2398, H8S/2394, H8S/2392 or
Register Access.
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
Notes on Register Access.
H8S/2390.
Description
[Clearing condition]
Cleared by reading TCSR when OVF = 1, then writing 0 to OVF
[Setting condition]
Set when TCNT overflows (changes from H'FF to H'00) in interval timer mode
:
:
:
:
R/(W)*
OVF
R/W
2
7
0
7
0
or an interval timer interrupt (WOVI) is generated, depending on the mode selected by the WT/IT bit
WT/IT
R/W
R/W
6
0
6
0
1
up-counter.
TME
R/W
R/W
5
0
5
0
R/W
—
—
4
0
4
1
R/W
—
—
3
0
3
1
CKS2
R/W
R/W
2
0
2
0
CKS1
R/W
R/W
1
0
1
0
(Initial value)
CKS0
R/W
R/W
0
0
0
0
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