M30625FGPGP#U9C Renesas Electronics America, M30625FGPGP#U9C Datasheet - Page 381
![IC M16C MCU FLASH 128LQFP](/photos/12/29/122943/m30625fgpgp_u9c_sml.jpg)
M30625FGPGP#U9C
Manufacturer Part Number
M30625FGPGP#U9C
Description
IC M16C MCU FLASH 128LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30625FGPGP#U9C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
128-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
•
Ports
A/D converter
D/A converter
Stopping peripheral functions
Switching the oscillation-driving capacity
Suggestions to reduce power consumption
The processor retains the state of each I/O port even when it goes to wait mode or to stop mode. A current
flows in active I/O ports. A pass current flows in input ports that high-impedance state. When entering wait
mode or stop mode, set non-used ports to input and stabilize the potential.
When A/D conversion is not performed, set the VCUT bit of ADiCON1 register to “0” (no VREF
connection).
When A/D conversion is performed, start the A/D conversion at least 1 µs or longer after setting the VCUT bit
to “1” (VREF connection).
Use the CM0 register CM02 bit to stop the unnecessary peripheral functions during wait mode.
However, because the peripheral function clock (fC32) generated from the sub-clock does not stop, this
measure is not conducive to reducing the power consumption of the chip. If low speed mode or low power
dissipation mode is to be changed to wait mode, set the CM02 bit to “0” (do not peripheral function clock
stopped when in wait mode), before changing wait mode.
Set the driving capacity to “LOW” when oscillation is stable.
When not performing D/A conversion, set the DAiE bit (i=0, 1) of DACON register to “0” (input inhibited)
and DAi register to “00h”.
Jan 10, 2006
Page 364 of 390
24. Precautions
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