M30625FGPGP#U9C Renesas Electronics America, M30625FGPGP#U9C Datasheet - Page 180
![IC M16C MCU FLASH 128LQFP](/photos/12/29/122943/m30625fgpgp_u9c_sml.jpg)
M30625FGPGP#U9C
Manufacturer Part Number
M30625FGPGP#U9C
Description
IC M16C MCU FLASH 128LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30625FGPGP#U9C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
128-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 15.21
Timer Bi Mode Register (i=0 to 5)
b7 b6 b5 b4
NOTES :
1.
2.
This flag is indeterminate after reset. When the TBiS bit = 1 (start counting), the MR3 bit is cleared to “0” (no overflow )
by w riting to the TBiMR register at the next count timing or later after the MR3 bit w as set to “1” (overflow ed). The
MR3 bit cannot be set to “1” in a program. The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR
register, and the TB3S to TB5S bits are assigned to the bit 5 to bit 7 in the TBSR register.
Selected by PCLK0 bit in the PCLKR register.
Jan 10, 2006
b3 b2 b1 b0
1 0
TBiMR Register in Pulse Period and Pulse Width Measurement Mode
Bit Symbol
TB0MR to TB2MR
TB3MR to TB5MR
TMOD0
TMOD1
TCK0
TCK1
MR0
MR1
MR2
MR3
Page 163 of 390
Symbol
Operation Mode Select Bit
Measurement Mode Select
Bit
TB0MR, TB3MR registers
TB1MR, TB2MR, TB4MR, TB5MR registers
Timer Bi Overflow Flag
Count Source Select Bit
Set to “0” in pulse period and pulse w idth measurement mode
Nothing is assigned. When w rite, set to “0”.
When read, its content is indeterminate.
Bit Name
039Bh to 039Dh
035Bh to 035Dh
Address
(1)
b1 b0
1 0 : Pulse period / pulse w idth measurement
b3 b2
0 0 : Pulse period measurement
0 1 : Pulse period measurement
1 0 : Pulse w idth measurement
1 1 : Do not set to this value
b7 b6
0 0 : f1 or f2
0 1 : f8
1 0 : f32
1 1 : fC32
0 : Timer did not overflow
1 : Timer has overflow ed
(Measurement betw een a falling edge and
(Measurement betw een a rising edge and
(Measurement betw een a falling edge and
mode
the next falling edge of measured pulse)
the next rising edge of measured pulse)
the next rising edge of measured pulse
and betw een a rising edge and the next
falling edge)
(2)
After Reset
00XX0000b
00XX0000b
Function
15. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RO
—
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