MC9S12C32MFUE25 Freescale Semiconductor, MC9S12C32MFUE25 Datasheet - Page 443

• Manufacturer Part Number: MC9S12C32MFUE25
• Description: IC MCU 32K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C32MFUE25

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 8
• Operating Supply Voltage: 3.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Write: Anytime
15.3.2.2
Read: Anytime but will always return 0x0000 (1 state is transient)
Write: Anytime
15.3.2.3
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0001
Module Base + 0x0002
FOC[7:0]
IOS[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
OC7M7
FOC7
Input Capture or Output Compare Channel Configuration
0 The corresponding channel acts as an input capture.
1 The corresponding channel acts as an output compare.
Force Output Compare Action for Channel 7:0 — A write to this register with the corresponding data bit(s) set
causes the action which is programmed for output compare “x” to occur immediately. The action taken is the
same as if a successful comparison had just taken place with the TCx register except the interrupt flag does not
get set.
Note: A successful channel 7 output compare overrides any channel 6:0 compares. If forced output compare on
Timer Compare Force Register (CFORC)
Output Compare 7 Mask Register (OC7M)
0
0
0
7
7
any channel occurs at the same time as the successful output compare then forced output compare action
will take precedence and interrupt flag won’t get set.
OC7M6
FOC6
0
0
0
Figure 15-8. Output Compare 7 Mask Register (OC7M)
6
6
Figure 15-7. Timer Compare Force Register (CFORC)
Table 15-4. CFORC Field Descriptions
Table 15-3. TIOS Field Descriptions
OC7M5
FOC5
MC9S12C-Family / MC9S12GC-Family
0
0
0
5
5
OC7M4
FOC4
Rev 01.24
0
0
0
4
4
Description
Description
Chapter 15 Timer Module (TIM16B8CV1) Block Description
OC7M3
FOC3
0
0
0
3
3
OC7M2
FOC2
0
0
0
2
2
OC7M1
FOC1
0
0
0
1
1
OC7M0
FOC0
0
0
0
0
0
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