Z8F0123SB005EG Zilog, Z8F0123SB005EG Datasheet - Page 85

• Manufacturer Part Number: Z8F0123SB005EG
• Description: IC ENCORE MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0123SB005EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 269-3757

PS024314-0308
of the Timer Input signal. When the Capture event occurs, an interrupt is generated and the
timer continues counting. The
interrupt is because of an input capture event.
The timer continues counting up to the 16-bit Reload value stored in the Timer Reload
High and Low Byte registers. Upon reaching the Reload value, the timer generates an
interrupt and continues counting. The INPCAP bit in TxCTL1 register clears indicating
the timer interrupt is not because of an input capture event.
Follow the steps below for configuring a timer for CAPTURE mode and initiating the
count:
1. Write to the Timer Control register to:
2. Write to the Timer High and Low Byte registers to set the starting count value
3. Write to the Timer Reload High and Low Byte registers to set the Reload value.
4. Clear the Timer PWM High and Low Byte registers to 0000H. Clearing these
5. Enable the timer interrupt, if appropriate, and set the timer interrupt priority by writing
6. Configure the associated GPIO port pin for the Timer Input alternate function.
7. Write to the Timer Control register to enable the timer and initiate counting.
In CAPTURE mode, the elapsed time from timer start to Capture event can be calculated
using the following equation:
CAPTURE RESTART Mode
In CAPTURE RESTART mode, the current timer count value is recorded when the
acceptable external Timer Input transition occurs. The Capture count value is written to
the Timer PWM High and Low Byte Registers. The timer input is the system clock. The
TPOL bit in the Timer Control register determines if the Capture occurs on a rising edge or
a falling edge of the Timer Input signal. When the Capture event occurs, an interrupt is
–
–
–
–
(typically
registers allows the software to determine if interrupts were generated by either a
Capture or a Reload event. If the PWM High and Low Byte registers still contain
0000H after the interrupt, the interrupt was generated by a Reload.
to the relevant interrupt registers. By default, the timer interrupt is generated for both
input Capture and Reload events. If appropriate, configure the timer interrupt to be
generated only at the input capture event or the Reload event by setting TICONFIG
field of the TxCTL1 register.
Capture Elapsed Time (s)
Disable the timer
Configure the timer for CAPTURE mode
Set the prescale value
Set the Capture edge (rising or falling) for the Timer Input
0001H
).
INPCAP
=
(
------------------------------------------------------------------------------------------------- -
Capture Value Start Value
bit in TxCTL1 register is set to indicate the timer
System Clock Frequency (Hz)
–
Z8 Encore! XP
Product Specification
) Prescale
×
®
F0823 Series
Timers
75