EP9301-CQZ Cirrus Logic Inc, EP9301-CQZ Datasheet - Page 464

IC ARM9 SOC PROCESSOR 208LQFP

EP9301-CQZ

Manufacturer Part Number
EP9301-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9301-CQZ

Core Size
16/32-Bit
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-TQFP, 208-VQFP
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
166MHz
No. Of Timers
4
Digital Ic Case Style
TQFP
Embedded Interface Type
SPI
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1136

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUS
Quantity:
3 390
Part Number:
EP9301-CQZ
Quantity:
1
Part Number:
EP9301-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9301-CQZ
Manufacturer:
CIRRUSLOGIC
Quantity:
20 000
Part Number:
EP9301-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
11
HcDoneHead
HcFmInterval
11-24
Universal Serial Bus Host Controller
EP93xx User’s Guide
FIT
31
15
31
15
Address:
Default:
Definition:
Bit Description:
Address:
Default:
Definition:
Bit Descriptions:
RSVD
30
14
30
14
29
13
29
13
28
12
28
12
0x8002_0030
0x0000_0000
Physical address of the last completed transfer descriptor that was added to
the done list.
RSVD:
AD:
0x8002_0034
0x0000_2EDF
Describes the bit time interval in a frame and the full speed maximum packet
size.
27
27
11
11
26
10
26
10
AD
Copyright 2007 Cirrus Logic
25
25
9
9
Reserved. Unknown During Read.
DoneHead. When a TD is completed, HC writes the
content of HcDoneHead to the NextTD field of the TD. HC
then overwrites the content of HcDoneHead with the
address of this TD. This is set to zero whenever HC writes
the content of this register to HCCA. It also sets the
WritebackDoneHead of HcInterruptStatus.
24
24
8
8
AD
FSMPS
23
23
7
7
FI
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
18
18
2
2
RSVD
17
17
1
1
DS785UM1
16
16
0
0

Related parts for EP9301-CQZ