ATMEGA644-20PU Atmel, ATMEGA644-20PU Datasheet - Page 301
![IC AVR MCU FLASH 64K 40DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA644-20PU
Manufacturer Part Number
ATMEGA644-20PU
Description
IC AVR MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN, ATAVRRZUSBSTICK, ATAVRRZ201
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA644-20PU
Manufacturer:
Atmel
Quantity:
1 930
- Current page: 301 of 376
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25.9
Table 25-17. Serial Programming Instruction Set (Hexadecimal values)
2593N–AVR–07/10
Instruction/Operation
Programming Enable
Chip Erase (Program Memory/EEPROM)
Poll RDY/BSY
Load Instructions
Load Extended Address byte
Load Program Memory Page, High byte
Load Program Memory Page, Low byte
Load EEPROM Memory Page (page access)
Read Instructions
Read Program Memory, High byte
Read Program Memory, Low byte
Read EEPROM Memory
Read Lock bits
Read Signature Byte
Read Fuse bits
Read Fuse High bits
Read Extended Fuse Bits
Read Calibration Byte
Write Instructions
Write Program Memory Page
Write EEPROM Memory
Serial Programming Instruction set
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
Table 25-16. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Table 25-17 on page 301
(1)
Symbol
t
t
t
WD_FLASH
WD_EEPROM
WD_ERASE
stored until the command is re-issued, that is, the command needs only be issued for the
first page, and when crossing the 64KWord boundary.
operation.
Set RESET to “1”.
Turn V
CC
power off.
Byte 1
$AC
$AC
$4D
$C1
$A0
$4C
$C0
$F0
$48
$40
$28
$20
$58
$30
$50
$58
$50
$38
and
Figure 25-11 on page 302
0000 00aa
0000 00aa
adr MSB
adr MSB
adr MSB
Byte 2
$53
$80
$00
$00
$00
$00
$00
$00
$00
$00
$08
$08
$00
Instruction Format
Minimum Wait Delay
describes the Instruction set.
Extended adr
0000 000aa
0000 000aa
aaaa aaaa
aaaa aaaa
4.5 ms
9.0 ms
9.0 ms
adr LSB
adr LSB
adr LSB
adr LSB
adr LSB
Byte 3
$00
$00
$00
$00
$00
$00
$00
$00
ATmega644
high data byte out
low data byte out
high data byte in
low data byte in
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte in
data byte in
Byte 4
$00
$00
$00
$00
301
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