SAK-C161CS-LF CA Infineon Technologies, SAK-C161CS-LF CA Datasheet - Page 9

• Manufacturer Part Number: SAK-C161CS-LF CA
• Description: IC MCU 16BIT 256KB TQFP-128-2
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAK-C161CS-LF CA

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 93
• Program Memory Type: ROMless
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 128-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: K161CSLFCANP; K161CSLFCAXT; SAK-C161CS-LFCA; SAK-C161CS-LFCAINTR; SAK-C161CS-LFCATR; SAK-C161CS-LFCATR; SAKC161CSLFCAXT; SP000106869

Table 2
Symbol Pin
RST
OUT
NMI
P6
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
Data Sheet
No.
1
2
5
6
7
8
9
10
11
12
Pin Definitions and Functions
Input
Outp.
O
I
IO
O
O
O
O
O
I
I/O
O
Function
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the C161CS/JC/JI to go into
power down mode. If NMI is high, when PWRDN is
executed, the part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Port 6 is an 8-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. Port 6 outputs can be configured as push/
pull or open drain drivers.
The Port 6 pins also serve for alternate functions:
CS0
CS1
CS2
CS3
CS4
HOLD
HLDA
BREQ
Chip Select 0 Output
Chip Select 1 Output
Chip Select 2 Output
Chip Select 3 Output
Chip Select 4 Output
External Master Hold Request Input
Hold Acknowledge Output (master mode)
or Input (slave mode)
Bus Request Output
5
C161CS/JC/JI-32R
C161CS/JC/JI-L
V3.0, 2001-01