SAK-C161CS-LF CA Infineon Technologies, SAK-C161CS-LF CA Datasheet - Page 17
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SAK-C161CS-LF CA
Manufacturer Part Number
SAK-C161CS-LF CA
Description
IC MCU 16BIT 256KB TQFP-128-2
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAK-C161CS-LF_CA.pdf
(89 pages)
Specifications of SAK-C161CS-LF CA
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
93
Program Memory Type
ROMless
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
128-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
K161CSLFCANP
K161CSLFCAXT
SAK-C161CS-LFCA
SAK-C161CS-LFCAINTR
SAK-C161CS-LFCATR
SAK-C161CS-LFCATR
SAKC161CSLFCAXT
SP000106869
K161CSLFCAXT
SAK-C161CS-LFCA
SAK-C161CS-LFCAINTR
SAK-C161CS-LFCATR
SAK-C161CS-LFCATR
SAKC161CSLFCAXT
SP000106869
Table 2
Symbol Pin
RSTIN
V
V
V
V
1)
2)
Data Sheet
AREF
AGND
DD
SS
The CAN and/or SDLM interface lines are assigned to ports P4 and P7 under software control. Within the CAN
module or SDLM several assignments can be selected.
Supply pins 25 and 26 feed the Analog/Digital Converter and should be decoupled separately.
No.
128
35
36
4, 18,
26
42, 52,
68, 78,
93, 111,
121
3, 17,
25
41, 51,
69, 79,
94, 112,
122,
125
2)
2)
,
,
Pin Definitions and Functions (cont’d)
Input
Outp.
I/O
–
–
–
–
Function
Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C161CS/
JC/JI. An internal pullup resistor permits power-on reset
using only a capacitor connected to
A spike filter suppresses input pulses < 10 ns. Input pulses
> 100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Note: To let the reset configuration of PORT0 settle and to
Reference voltage for the A/D converter.
Reference ground for the A/D converter.
Digital Supply Voltage:
+5 V during normal operation and idle mode.
Digital Ground.
2.5 V during power down mode if RTC is off
2.7 V during power down mode if RTC is running
let the PLL lock a reset duration of ca. 1 ms is
recommended.
13
V
SS
C161CS/JC/JI-32R
.
C161CS/JC/JI-L
V3.0, 2001-01