MC68331CEH16 Freescale Semiconductor, MC68331CEH16 Datasheet - Page 76

• Manufacturer Part Number: MC68331CEH16
• Description: IC MCU 32BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Package: 132PQFP
• Device Core: ColdFire
• Family Name: 68K/M683xx
• Maximum Speed: 16 MHz
• Ram Size: 80 Byte
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 18
• Interface Type: QSPI/SCI/UART
• Number Of Timers: 1
• Processor Series: M683xx
• Core: CPU32
• Eeprom Memory: 0 Bytes
• Input Output: 18
• Interface: EBI/EMI, SCI, SPI, UART/USART
• Ios: 18
• Memory Type: ROMless
• Number Of Bits: 32
• Package Type: 132-pin QFP
• Programmable Memory: 0 Bytes
• Voltage, Range: 4.5-5.5 V
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 16MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Ram Size: 80 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PACTL/PACNT — Pulse Accumulator Control Register/Counter
DDRGP/PORTGP — Port GP Data Direction Register/Port GP Data Register
DDRGP[7:0] — Port GP Data Direction Register
OC1M/OC1D — OC1 Action Mask Register/OC1 Action Data Register
OC1M[5:1] — OC1 Mask Field
OC1D[5:1] — OC1 Data Field
TCNT — Timer Counter Register
PAIS — PAI Pin State (Read Only)
PAEN — Pulse Accumulator System Enable
76
RESET:
RESET:
RESET:
DDGP7
PAIS
15
U
15
15
0
0
When GPT pins are used as an 8-bit port, DDRGP determines whether pins are input or output and
PORTGP holds the 8-bit data.
Each bit in DDRGP determines whether the corresponding PORTGP bit is input or output.
All OC outputs can be controlled by the action of OC1. OC1M contains a mask that determines which
pins are affected. OC1D determines what the outputs are.
OC1M[5:1] correspond to OC[5:1].
OC1D[5:1] correspond to OC[5:1].
TCNT is the 16-bit free-running counter associated with the input capture, output compare, and pulse
accumulator functions of the GPT module.
PACTL enables the pulse accumulator and selects either event counting or gated mode. In event count-
ing mode, PACNT is incremented each time an event occurs. In gated mode, it is incremented by an
internal clock.
0 = Input only
1 = Output
0 = Corresponding output compare pin is not affected by OC1 compare.
1 = Corresponding output compare pin is affected by OC1 compare.
0 = If OC1 mask bit is set, clear the corresponding output compare pin on OC1 match.
1 = If OC1 mask bit is set, set the corresponding output compare pin on OC1 match.
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
PAEN
DDGP6 DDGP5 DDGP4 DDGP3 DDGP2 DDGP1 DDGP0
14
0
14
0
0
OC1M
PAMOD
13
13
0
0
0
PEDGE PCLKS
12
0
0
12
0
Freescale Semiconductor, Inc.
11
11
For More Information On This Product,
0
0
11
U
I4/O5
10
10
0
0
0
10
0
Go to: www.freescale.com
9
0
9
0
0
9
0
PACLK
8
0
8
0
0
8
0
PGP7
7
0
7
0
7
0
PGP6
6
0
0
0
PGP5
OC1D
5
0
0
0
PGP4
4
0
0
0
PACNT
PGP3
3
0
3
0
0
PGP2
2
0
2
0
0
0
MC68331TS/D
PGP1
$YFF90C
1
0
1
0
0
$YFF90A
$YFF906
$YFF908
0
PGP0
0
0
0
0
0
0
0