MC908JB16DWE Freescale Semiconductor, MC908JB16DWE Datasheet - Page 57

IC MCU 16K FLASH 6MHZ USB 28SOIC

MC908JB16DWE

Manufacturer Part Number
MC908JB16DWE
Description
IC MCU 16K FLASH 6MHZ USB 28SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908JB16DWE

Core Processor
HC08
Core Size
8-Bit
Speed
6MHz
Connectivity
SCI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C/SCI/SPI/USB
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Controller Family/series
HC08
No. Of I/o's
21
Ram Memory Size
384Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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3.1 Contents
3.2 Introduction
3.3 Functional Description
MC68HC908JB16
Freescale Semiconductor
Technical Data — MC68HC908JB16
NOTE:
NOTE:
Rev. 1.1
Section 3. Random-Access Memory (RAM)
3.2
3.3
This section describes the 384 bytes of RAM (random-access memory).
Addresses $0080 through $01FF are RAM locations. The location of the
stack RAM is programmable. The 16-bit stack pointer allows the stack to
be anywhere in the 64K-byte memory space.
For correct operation, the stack pointer must point only to RAM
locations.
Within page zero are 128 bytes of RAM. Because the location of the
stack RAM is programmable, all page zero RAM locations can be used
for I/O control and user data or code. When the stack pointer is moved
from its reset location at $00FF out of page zero, direct addressing mode
instructions can efficiently access all page zero RAM locations. Page
zero RAM, therefore, provides ideal locations for frequently accessed
global variables.
Before processing an interrupt, the CPU uses five bytes of the stack to
save the contents of the CPU registers.
For M6805 compatibility, the H register is not stacked.
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
Random-Access Memory (RAM)
Technical Data
57

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