LPC3250FET296,551 NXP Semiconductors, LPC3250FET296,551 Datasheet - Page 25
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LPC3250FET296,551
Manufacturer Part Number
LPC3250FET296,551
Description
IC ARM9 MCU 256K 296-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC32x0r
Datasheet
1.OM11079.pdf
(77 pages)
Specifications of LPC3250FET296,551
Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, Motor Control PWM, PWM, WDT
Number Of I /o
51
Program Memory Type
ROMless
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 3x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
296-TFBGA
Processor Series
LPC32
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
256 KB
Interface Type
I2C, I2S, UART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
51
Number Of Timers
6
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DK-57TS-LPC3250, DK-57VTS-LPC3250, SOMDIMM-LPC3250
Development Tools By Supplier
OM11016, OM11021, OM11045
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
OM11021 - EVAL LPC-STICK WITH LPC3250OM11016 - KIT DEVELOPMENT LPC3250568-4743 - KIT LCD TOUCH 5.7" FOR LPC3250568-4742 - MODULE DIMM LPC2478 ARM7622-1030 - KIT LCD TOUCH 5.7" FOR LPC3250
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4533
935287084551
935287084551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC3250FET296,551
Manufacturer:
BONENS
Quantity:
98
Company:
Part Number:
LPC3250FET296,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC3220_30_40_50_1
Product data sheet
7.2.1 APB
7.2.2 FAB
7.3 Physical memory map
Many peripheral functions are accessed by on-chip APBs that are attached to the higher
speed AHB. The APB performs reads and writes to peripheral registers in three peripheral
clocks.
Some peripherals are placed on a special bus called FAB that allows faster CPU access
to those peripheral functions. A write access to FAB peripherals takes a single AHB clock
and a read access to FAB peripherals takes two AHB clocks.
The physical memory map incorporates several distinct regions, as shown in
When an application is running, the CPU interrupt vectors are re-mapped to allow them to
reside in on-chip SRAM (IRAM).
All information provided in this document is subject to legal disclaimers.
Rev. 01.03 — 16 March 2010
LPC3220/30/40/50
16/32-bit ARM microcontrollers
© NXP B.V. 2010. All rights reserved.
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