PIC17C44-25/L Microchip Technology, PIC17C44-25/L Datasheet - Page 16

IC MCU OTP 8KX16 PWM 44PLCC

PIC17C44-25/L

Manufacturer Part Number
PIC17C44-25/L
Description
IC MCU OTP 8KX16 PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr

Specifications of PIC17C44-25/L

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
25MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Controller Family/series
PIC17
No. Of I/o's
33
Ram Memory Size
454Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
2
Embedded Interface Type
USART
Rohs Compliant
Yes
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
454 B
Interface Type
SCI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164317 - MODULE SKT MPLAB PM3 44PLCCDVA17XL441 - DEVICE ADAPTER FOR PIC17C42A309-1007 - ADAPTER 44-PLCC ZIF TO 40-DIPAC174002 - MODULE SKT PROMATEII 44PLCC
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C44-25/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC17C4X
4.1.3
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle (1024T
detected high or a wake-up from SLEEP event occurs.
The OST time-out is invoked only for XT and LF oscilla-
tor modes on a Power-on Reset or a Wake-up from
SLEEP.
The OST counts the oscillator pulses on the
OSC1/CLKIN pin. The counter only starts incrementing
after the amplitude of the signal reaches the oscillator
input thresholds. This delay allows the crystal oscillator
or resonator to stabilize before the device exits reset.
The length of time-out is a function of the crystal/reso-
nator frequency.
4.1.4
On power-up the time-out sequence is as follows: First
the internal POR signal goes high when the POR trip
point is reached. If MCLR is high, then both the OST
and PWRT timers start. In general the PWRT time-out
is longer, except with low frequency crystals/resona-
tors. The total time-out also varies based on oscillator
configuration. Table 4-1 shows the times that are asso-
ciated with the oscillator configuration. Figure 4-2 and
Figure 4-3 display these time-out sequences.
If the device voltage is not within electrical specification
at the end of a time-out, the MCLR/V
held low until the voltage is within the device specifica-
tion. The use of an external RC delay is sufficient for
many of these applications.
TABLE 4-3:
DS30412C-page 16
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset during normal operation
WDT Reset during SLEEP
Interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented read as '0'.
Note 1: On wake-up, this instruction is executed. The instruction at the appropriate interrupt vector is fetched and
2: The OST is only active when the Oscillator is configured for XT or LF modes.
3: The Program Counter = 0, that is the device branches to the reset vector. This is different from the
OSCILLATOR START-UP TIMER (OST)
TIME-OUT SEQUENCE
then executed.
mid-range devices.
RESET CONDITION FOR THE PROGRAM COUNTER AND THE CPUSTA REGISTER
Event
OSC
(3)
) delay after MCLR is
GLINTD is set
GLINTD is clear
PP
pin must be
PCH:PCL
PC + 1
PC + 1
0000h
0000h
0000h
0000h
0000h
TABLE 4-1:
The time-out sequence begins from the first rising edge
of MCLR.
Table 4-3 shows the reset conditions for some special
registers, while Table 4-4 shows the initialization condi-
tions for all the registers. The shaded registers (in
Table 4-4) are for all devices except the PIC17C42. In
the PIC17C42, the PRODH and PRODL registers are
general purpose RAM.
TABLE 4-2:
In Figure 4-2, Figure 4-3 and Figure 4-4, T
T
tals. For lower frequency crystals, (i.e., 32 kHz) T
would be greater.
Configuration
TO
OST
1
1
0
0
(1)
Oscillator
EC, RC
XT, LF
, as would be the case in higher frequency crys-
PD
1
0
1
0
Power-on Reset, MCLR Reset during normal
operation, or CLRWDT instruction executed
MCLR Reset during SLEEP or interrupt wake-up
from SLEEP
WDT Reset during normal operation
WDT Reset during SLEEP
--11 11--
--11 11--
--11 10--
--11 01--
--11 00--
--11 10--
--10 10--
CPUSTA
Greater of:
Greater of:
1024T
1024T
TIME-OUT IN VARIOUS
SITUATIONS
STATUS BITS AND THEIR
SIGNIFICANCE
Power-up
96 ms or
96 ms or
OSC
OSC
1996 Microchip Technology Inc.
Event
1024T
Wake up
SLEEP
from
OST Active
OSC
Yes
Yes
Yes
Yes
Yes
No
No
(2)
(2)
(2)
(2)
PWRT
MCLR
Reset
OST
>

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