ATMEGA3290PV-10AU Atmel, ATMEGA3290PV-10AU Datasheet - Page 77

• Manufacturer Part Number: ATMEGA3290PV-10AU
• Description: IC MCU 32K 4X40 LCD CTRL 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA3290PV-10AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK504 - STARTER KIT AVR EXP MOD 100P LCDATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA3290PV-8AU; ATMEGA3290PV-8AU

8021G–AVR–03/11
Table 13-13
shown in
Table 13-13. Overriding Signals for Alternate Functions PD7:PD4
Table 13-14. Overriding Signals for Alternate Functions in PD3:PD0
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Figure 13-5 on page
and
PD7/SEG(19/15)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
–
–
LCDSEG
PD3/SEG(23/19)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
–
LCDSEG
Table 13-14
relates the alternate functions of Port D to the overriding signals
69.
PD6/SEG(20/16)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
–
–
LCDSEG
PD2/SEG(24/20)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
–
LCDSEG
PD5/SEG(21/17)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
–
–
LCDSEG
PD1/INT0/
SEG(25/21)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN +
(INT0 ENABLE)
LCDEN •
(INT0 ENABLE)
INT0 INPUT
LCDSEG
ATmega329P/3290P
PD4/SEG(22/18)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
–
–
LCDSEG
PD0/ICP1/
SEG(26/22)
LCDEN • (LCDPM)
0
LCDEN • (LCDPM)
0
0
0
–
LCDEN • (LCDPM)
0
ICP1 INPUT
LCDSEG
77