PIC18F2320-I/SP Microchip Technology, PIC18F2320-I/SP Datasheet - Page 278

• Manufacturer Part Number: PIC18F2320-I/SP
• Description: IC MCU FLASH 4KX16 EEPROM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2320-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI/I2C/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2220/2320/4220/4320
DAW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example1:
Example 2:
DS39599G-page 276
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
DC
W
C
DC
W
C
DC
W
C
DC
Q1
=
=
=
=
=
=
=
=
=
=
=
=
register W
Decimal Adjust W Register
[ label ] DAW
None
If [W<3:0> >9] or [DC = 1] then,
(W<3:0>) + 6 → W<3:0>;
else,
(
If [W<7:4> >9] or [C = 1] then,
(
else,
(W<7:4>) → W<7:4>
C, DC
DAW adjusts the eight-bit value in
W, resulting from the earlier addi-
tion of two variables (each in
packed BCD format) and produces
a correct packed BCD result. The
carry bit may be set by DAW regard-
less of its setting prior to the DAW
execution.
1
1
DAW
W<3:0>) → W<3:0>;
W<7:4>) + 6 → W<7:4>;
Read
0000
Q2
0xA5
0
0
0x05
1
0
0xCE
0
0
0x34
1
0
0000
Process
Data
Q3
0000
Write
Q4
W
0111
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register ‘f’
Decrement f
[ label ] DECF f [,d [,a]]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) – 1 → dest
C, DC, N, OV, Z
Decrement register ‘f’. If ‘d’ is ‘0’,
the result is stored in W. If ‘d’ is ‘1’,
the result is stored back in register
‘f’ (default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
DECF
Read
0000
Q2
0x01
0
0x00
1
© 2007 Microchip Technology Inc.
CNT,
01da
Process
Data
Q3
ffff
destination
Write to
Q4
ffff