PIC18F2320-I/SP Microchip Technology, PIC18F2320-I/SP Datasheet - Page 230
PIC18F2320-I/SP
Manufacturer Part Number
PIC18F2320-I/SP
Description
IC MCU FLASH 4KX16 EEPROM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1320-ISS.pdf
(36 pages)
3.PIC18F2220-ISO.pdf
(394 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(8 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
9.PIC18F2220-ISP.pdf
(388 pages)
Specifications of PIC18F2320-I/SP
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI/I2C/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F1320-ISS PDF datasheet #2
- PIC18F2220-ISO PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- PIC18F2220-ISP PDF datasheet #9
- Current page: 230 of 394
- Download datasheet (7Mb)
PIC18F2220/2320/4220/4320
FIGURE 21-1:
21.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 21-1) keep CV
ence source rails. The voltage reference is derived
from V
fluctuations in V
the voltage reference can be found in Section 26.0
“Electrical Characteristics”.
21.3
The contents of the CVRCON register are not affected
by entry to or exit from power-managed modes. To min-
imize current consumption in power-managed modes,
the voltage reference module should be disabled; how-
ever, this can cause an interrupt from the comparators
so the comparator interrupt should also be disabled
while the CVRCON register is being modified.
DS39599G-page 228
CVREN
DD
Voltage Reference Accuracy/Error
Operation in Power-Managed
Modes
RA2/AN2/V
; therefore, the CV
DD
CV
. The tested absolute accuracy of
REF
REF
REF
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
-/CV
V
DD
from approaching the refer-
REF
CVROE
REF
8R
output changes with
R
R
16 Stages
16-1 Analog Mux
21.4
A device Reset disables the voltage reference by clear-
ing the CVRCON register. This also disconnects the
reference from the RA2 pin, selects the high-voltage
range and selects the lowest voltage tap from the
resistor divider.
21.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be output using the RA2 pin if the
CVROE bit is set. Enabling the voltage reference out-
put onto the RA2 pin, with an input signal present, will
increase current consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, an external buffer must be used on the
voltage reference output for external connections to
V
technique.
REF
. Figure 21-2 shows an example buffering
R
Effects of a Reset
Connection Considerations
R
© 2007 Microchip Technology Inc.
8R
CVR3
CVR0
(From CVRCON<3:0>)
CVRR
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