ATMEGA16L-8PU Atmel, ATMEGA16L-8PU Datasheet - Page 84
ATMEGA16L-8PU
Manufacturer Part Number
ATMEGA16L-8PU
Description
IC AVR MCU 16K 8MHZ 3V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA16L-8MI.pdf
(26 pages)
2.ATMEGA16L-8MI.pdf
(357 pages)
3.ATMEGA16-16PU.pdf
(358 pages)
Specifications of ATMEGA16L-8PU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.7-5.5 V
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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84
ATmega16(L)
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the WGM01:0
bit setting.
normal or CTC mode (non-PWM).
Table 39. Compare Output Mode, non-PWM Mode
Table 40
mode.
Table 40. Compare Output Mode, Fast PWM Mode
Note:
Table 41
PWM mode.
Table 41. Compare Output Mode, Phase Correct PWM Mode
Note:
COM01
COM01
COM01
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the compare
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the compare
shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase correct
shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast PWM
COM00
Table 39
match is ignored, but the set or clear is done at TOP. See
more details.
match is ignored, but the set or clear is done at TOP. See
79
0
1
0
1
for more details.
COM00
COM00
0
1
0
1
0
1
0
1
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match when up-counting. Set OC0 on compare
match when downcounting.
Set OC0 on compare match when up-counting. Clear OC0 on compare
match when downcounting.
shows the COM01:0 bit functionality when the WGM01:0 bits are set to a
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on compare match, set OC0 at BOTTOM,
(non-inverting mode)
Set OC0 on compare match, clear OC0 at BOTTOM,
(inverting mode)
Description
Normal port operation, OC0 disconnected.
Toggle OC0 on compare match
Clear OC0 on compare match
Set OC0 on compare match
(1)
(1)
“Phase Correct PWM Mode” on page
“Fast PWM Mode” on page 77
2466R–AVR–06/08
for
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