ATMEGA16L-8PU Atmel, ATMEGA16L-8PU Datasheet - Page 248
![IC AVR MCU 16K 8MHZ 3V 40DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA16L-8PU
Manufacturer Part Number
ATMEGA16L-8PU
Description
IC AVR MCU 16K 8MHZ 3V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA16L-8MI.pdf
(26 pages)
2.ATMEGA16L-8MI.pdf
(357 pages)
3.ATMEGA16-16PU.pdf
(358 pages)
Specifications of ATMEGA16L-8PU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
8 MIPS
Eeprom Memory
512 Bytes
Input Output
32
Interface
JTAG/SPI/UART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.7-5.5 V
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 248 of 358
- Download datasheet (6Mb)
Boot Loader Lock
Bits
248
ATmega16(L)
Figure 125. Memory Sections
Note:
If no Boot Loader capability is needed, the entire Flash is available for application code. The
Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives
the user a unique flexibility to select different levels of protection.
The user can select:
•
•
•
•
See
Serial or Parallel Programming mode, but they can be cleared by a Chip Erase command only.
The general Write Lock (Lock Bit mode 2) does not control the programming of the Flash mem-
ory by SPM instruction. Similarly, the general Read/Write Lock (Lock Bit mode 3) does not
control reading nor writing by LPM/SPM, if it is attempted.
To protect the entire Flash from a software update by the MCU
To protect only the Boot Loader Flash section from a software update by the MCU
To protect only the Application Flash section from a software update by the MCU
Allow software update in the entire Flash
Table 96
1. The parameters in the figure above are given in
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
Application Flash Section
and
Program Memory
Program Memory
BOOTSZ = '11'
BOOTSZ = '01'
Table 97
for further details. The Boot Lock bits can be set in software and in
(1)
$0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
$0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
Boot Loader Flash Section
Boot Loader Flash Section
Application Flash Section
Application Flash Section
Application flash Section
Table 100 on page
Program Memory
Program Memory
BOOTSZ = '10'
BOOTSZ = '00'
257.
$0000
End RWW
Start NRWW
End Application
Start Boot Loader
Flashend
$0000
End RWW, End Application
Start NRWW, Start Boot Loader
Flashend
2466R–AVR–06/08
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