ATMEGA16L-8PU Atmel, ATMEGA16L-8PU Datasheet - Page 348

• Manufacturer Part Number: ATMEGA16L-8PU
• Description: IC AVR MCU 16K 8MHZ 3V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16L-8PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• A/d Inputs: 8-Channel, 10-Bit
• Cpu Speed: 8 MIPS
• Eeprom Memory: 512 Bytes
• Input Output: 32
• Interface: JTAG/SPI/UART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 16K Bytes
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2.7-5.5 V
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev. 2466E-10/02
Rev. 2466D-09/02
Rev. 2466C-03/02
348
ATmega16(L)
14. Added section
15. Added note about Differential Mode with Auto Triggering in
16. Added updated
1. Updated
1. Changed all Flash write/erase cycles from 1,000 to 10,000.
2. Updated the following tables:
3. Updated
1. Updated typical EEPROM programming time,
2. Updated typical start-up time in the following tables:
3. Updated
4. Added Some Preliminary Test Limits and Characterization Data.
5. Updated TWI Chapter.
6. Corrected description of ADSC bit in
7. Improved description on how to do a polarity check of the ADC doff results in
8. Added JTAG version number for rev. H in
9. Added not regarding OCDEN Fuse below
10. Updated Programming Figures:
11. Added a note regarding usage of the
sion Timing” on page
page
on page
page
Table 3 on page
on page
Removed some of the TBD's in the following tables and pages:
Table 15 on page
ment review #D),
121 on page
Added the note at the end of the
on page
Conversion Result” on page
Figure 127 on page 262
must be connected during Programming mode.
how to program the fuses.
“PROG_PAGEREAD ($7)” on page
85,
291,
29, and
219.
167,
“DC Characteristics” on page
Table 45 on page
“Errata” on page
Table 17 on page 43
Table 119 on page
295, and
Table 90 on page
“EEPROM Write During Power-down Sleep Mode” on page
Table 10 on page
“Packaging Information” on page
25,
38,
“Electrical Characteristics” on page
Table 5 on page
Table 16 on page
Table 122 on page
207.
and
340.
111,
Figure 136 on page 273
216.
293,
with typical WDT Time-out.
Table 4 on page
“Bit Rate Generator Unit” on page
Table 46 on page
235,
29.
Table 121 on page
280.
27,
Table 102 on page
“ADC Control and Status Register A – ADCSRA”
42, Table 116 on page 272 (table removed in docu-
291.
Table 6 on page
297.
“PROG_PAGELOAD ($6)” on page 280
Table 105 on page
Table 87 on page
Figure 131 on page 269
Table 1 on page
26,
111,
337.
are updated to also reflect that AVCC
Table 15 on page
291,
295, and
Table 59 on page
28,
258,
Table 119 on page
Table 8 on page
229.
260.
“Prescaling and Conver-
“DC Characteristics” on
Table 122 on page
20.
178.
added to illustrate
38,
143,
2466R–AVR–06/08
Table 42 on
22.
29,
293,
Table 67
Table 9
“ADC
Table
297.
and