PIC18F2331-I/SP Microchip Technology, PIC18F2331-I/SP Datasheet - Page 194

• Manufacturer Part Number: PIC18F2331-I/SP
• Description: IC PIC MCU FLASH 4KX16 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2331-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART/I2C/SPI/SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, ICE2000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
17.4.4
This mode is available in Up/Down Counting mode. In
the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR
register is equal to zero and each time the PTMR
matches with PTPER register. Figure 17-8 shows the
interrupts in Up/Down Counting mode with double
updates.
The Double Update mode provides two additional
functions to the user in Center-Aligned mode.
1.
2.
FIGURE 17-8:
DS39616B-page 192
PTMR_INT_REQ
PTMR_INT_REQ
A: PRESCALER = 1:1
Note 1: Interrupt flag bit PTIF is sampled here (every Q1).
PTDIR bit
The control loop bandwidth is doubled because
the PWM duty cycles can be updated twice per
period.
Asymmetrical center-aligned PWM waveforms
can be generated, which are useful for
minimizing output waveform distortion in certain
motor control applications.
PTMR
PTMR
PTDIR bit
PTIF bit
OSC1
PTIF bit
OSC1
2: PWM Time Base Period register, PTPER, is loaded with the value 3FFh for this example.
INTERRUPTS IN DOUBLE UPDATE
MODE
Case 1: PTMR Counting Upwards
Case 2: PTMR Counting Downwards
Q1
Q1
1
1
Q2
Q2
PWM TIME BASE INTERRUPTS, UP/DOWN COUNTING MODE WITH DOUBLE
3FDh
002h
UPDATES
Q3
Q3
Q4
Q4
Q1
1
Q1
1
Q2
Q2
3FEh
001h
Q3
Q3
Preliminary
Q4
Q4
Q1
Q1
1
1
2
Q2
Q2
3FFh
000h
Note:
Q3
Q3
Q4
Q4
Do not change PTMOD while PTEN is
active. It will yield unexpected results. To
change PWM Timer mode of operation,
first clear PTEN bit, load PTMOD with
required data and then set PTEN.
Q1
1
Q1
1
Q2
Q2
3FEh
001h
Q3
Q3
 2003 Microchip Technology Inc.
Q4
Q4
Q1
Q1
Q2
Q2
3FDh
002h
Q3
Q3
Q4
Q4