DSPIC33FJ12MC201-I/SO Microchip Technology, DSPIC33FJ12MC201-I/SO Datasheet - Page 194

• Manufacturer Part Number: DSPIC33FJ12MC201-I/SO
• Description: IC DSPIC MCU/DSP 12K 20SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 12KB (12K x 8)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 15
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 15
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ12MC201/202
18.1
The UART module includes a dedicated 16-bit Baud
Rate Generator (BRG). The BRGx register controls the
period of a free-running 16-bit timer. Equation 18-1
shows the formula for computation of the baud rate
with BRGH = 0.
EQUATION 18-1:
Example 18-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
The maximum baud rate (BRGH = 0) possible is
F
possible is F
EXAMPLE 18-1:
DS70265B-page 192
CY
Desired Baud Rate
Solving for BRGx Value:
Calculated Baud Rate
Error
Note:
CY
/16 (for BRGx = 0), and the minimum baud rate
= 4 MHz
UART Baud Rate Generator (BRG)
F
frequency (F
CY
CY
Baud Rate =
BRGx =
BRGx
BRGx
BRGx
/(16 * 65536).
denotes the instruction cycle clock
UART BAUD RATE WITH
16 • Baud Rate
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
OSC
=
=
=
=
=
=
=
=
=
16 • (BRGx + 1)
F
/2
CY
F
((F
((4000000/9600)/16) – 1
25
9615
(Calculated Baud Rate – Desired Baud Rate)
(9615 – 9600)/9600
0.16%
4000000/(16 (25 + 1))
).
CY
F
CY
/(16 (BRGx + 1))
CY
/Desired Baud Rate)/16) – 1
– 1
Desired Baud Rate
Preliminary
Equation 18-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 18-2:
The maximum baud rate (BRGH = 1) possible is F
(for BRGx = 0), and the minimum baud rate possible is
F
Writing a new value to the BRGx register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note:
/(4 * 65536).
F
frequency (F
CY
Baud Rate =
BRGx =
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH =
4 • Baud Rate
© 2007 Microchip Technology Inc.
OSC
4 • (BRGx + 1)
F
/2).
CY
F
1
CY
– 1
CY
/4