DSPIC33FJ12MC201-I/SO Microchip Technology, DSPIC33FJ12MC201-I/SO Datasheet - Page 167

• Manufacturer Part Number: DSPIC33FJ12MC201-I/SO
• Description: IC DSPIC MCU/DSP 12K 20SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 12KB (12K x 8)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 15
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 15
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.0
This section describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining mechanical position data.
FIGURE 15-1:
© 2007 Microchip Technology Inc.
Note:
UPDN
INDX
QEA
QEB
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
This data sheet summarizes the features
of the dsPIC33FJ12MC201/202 devices.
It is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“dsPIC33F Family Reference Manual”.
Please see the Microchip web site
(www.microchip.com)
dsPIC33F
chapters.
Synchronize
Sleep Input
Det
PCDOUT
UPDN_SRC
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
Programmable
0
Programmable
1
Programmable
1
0
Digital Filter
Digital Filter
Family
Digital Filter
QEICON<11>
Existing Pin Logic
Up/Down
3
Reference
QEIM<2:0>
for
T
CY
Interface Logic
the
Quadrature
TQCS
Encoder
0
1
Mode Select
QEIM<2:0>
Manual
latest
Preliminary
3
TQGATE
dsPIC33FJ12MC201/202
1
0
2
The operational features of the QEI include:
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate bits, QEIM<2:0> in (QEICON<10:8>).
Figure 15-1 depicts the Quadrature Encoder Interface
block diagram.
index pulse
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(MAXCNT)
(POSCNT)
TQCKPS<1:0>
Q
Q
1, 8, 64, 256
Prescaler
2
Reset
Equal
DS70265B-page 165
QEIIF
Event
Flag