ATMEGA328-MU Atmel, ATMEGA328-MU Datasheet - Page 314

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ATMEGA328-MU

Manufacturer Part Number
ATMEGA328-MU
Description
IC MCU AVR 32K FLASH 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA328-MU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATMEGA32x
Core
AVR
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
ATMEGA328
Supply Current (max)
0.2 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 27-19. Serial Programming Instruction Set (Hexadecimal values) (Continued)
Notes:
8271C–AVR–08/10
Instruction/Operation
Read Calibration Byte
Write Instructions
Write Program Memory Page
Write EEPROM Memory
Write EEPROM Memory Page (page access)
Write Lock bits
Write Fuse bits
Write Fuse High bits
Write Extended Fuse Bits
1. Not all instructions are applicable for all parts.
2. a = address.
3. Bits are programmed ‘0’, unprogrammed ‘1’.
4. To ensure future compatibility, unused Fuses and Lock bits should be unprogrammed (‘1’) .
5. Refer to the corresponding section for Fuse and Lock bits, Calibration and Signature bytes and Page size.
6. Instructions accessing program memory use a word address. This address may be random within the page range.
7. See http://www.atmel.com/avr for Application Notes regarding programming and programmers.
8. WORDS
(6)
If the LSB in RDY/BSY data byte out is ‘1’, a programming operation is still pending. Wait until
this bit returns ‘0’ before the next instruction is carried out.
Within the same page, the low data byte must be loaded prior to the high data byte.
After data is loaded to the page buffer, program the EEPROM page, see
315.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Byte 1
$AC
$AC
$AC
$AC
$4C
$C0
$C2
$38
adr MSB
0000 00aa
0000 00aa
Byte 2
$E0
$A0
$A8
$A4
$00
Instruction Format
(8)
aaaa aaaa
aaaa aa00
adr LSB
Byte 3
$00
$00
$00
$00
$00
(8)
Figure 27-8 on page
data byte out
data byte in
data byte in
data byte in
data byte in
data byte in
Byte4
$00
$00
314

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