ATMEGA328-MU Atmel, ATMEGA328-MU Datasheet - Page 170

• Manufacturer Part Number: ATMEGA328-MU
• Description: IC MCU AVR 32K FLASH 32QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA328-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATMEGA32x
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Operating Temperature Range: - 40 C to + 85 C
• Processor To Be Evaluated: ATMEGA328
• Supply Current (max): 0.2 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8271C–AVR–08/10
Note:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Assembly Code Example
C Code Example
SPI_MasterInit:
SPI_MasterTransmit:
Wait_Transmit:
void SPI_MasterInit(void)
{
}
void SPI_MasterTransmit(char cData)
{
}
; Set MOSI and SCK output, all others input
ldi
out
; Enable SPI, Master, set clock rate fck/16
ldi
out
ret
; Start transmission of data (r16)
out
; Wait for transmission complete
in
sbrsr16, SPIF
rjmp Wait_Transmit
ret
/* Set MOSI and SCK output, all others input */
DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK);
/* Enable SPI, Master, set clock rate fck/16 */
SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0);
/* Start transmission */
SPDR = cData;
/* Wait for transmission complete */
while(!(SPSR & (1<<SPIF)))
1.
;
See ”About Code Examples” on page 7.
r17,(1<<DD_MOSI)|(1<<DD_SCK)
DDR_SPI,r17
r17,(1<<SPE)|(1<<MSTR)|(1<<SPR0)
SPCR,r17
SPDR,r16
r16, SPSR
(1)
(1)
170