PIC12F635-I/P Microchip Technology, PIC12F635-I/P Datasheet - Page 39

• Manufacturer Part Number: PIC12F635-I/P
• Description: IC MCU FLASH 1KX14 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/P

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/SPI/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120, DM163029, DV164101, DM163014
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 9.27 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSAC162057 - MPLAB ICD 2 HEADER 14DIPACICE0201 - MPLABICE 8P 300 MIL ADAPTERAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.7.1
The Fail-Safe condition is cleared after a Reset, the
execution of a SLEEP instruction, or a modification of the
SCS bit. While in Fail-Safe condition, the PIC12F635/
PIC16F636/639 uses the internal oscillator as the
system clock source. The IRCF bits (OSCCON<6:4>)
can be modified to adjust the internal oscillator
frequency without exiting the Fail-Safe condition.
FIGURE 3-9:
3.7.2
The FSCM is designed to detect oscillator failure at any
point after the device has exited a Reset or Sleep
condition and the Oscillator Start-up Timer (OST) has
expired. If the external clock is EC or RC mode,
monitoring will begin immediately following these
events.
For LP, XT or HS mode, the external oscillator may
require a start-up time considerably longer than the
FSCM sample clock time or a false clock failure may be
detected (see Figure 3-9). To prevent this, the internal
oscillator is automatically configured as the system
clock and functions until the external clock is stable (the
OST has timed out). This is identical to Two-Speed
Start-up mode. Once the external oscillator is stable,
the LFINTOSC returns to its role as the FSCM source.
© 2005 Microchip Technology Inc.
Note:
Sample Clock
CM Output
FAIL-SAFE CONDITION CLEARING
RESET OR WAKE-UP FROM SLEEP
OSCFIF
System
Output
Clock
The system clock is normally at a much higher frequency than the sample clock. The relative
frequencies in this example have been chosen for clarity.
(Q)
FSCM TIMING DIAGRAM
CM Test
PIC12F635/PIC16F636/639
Preliminary
The Fail-Safe condition must be cleared before the
OSFIF flag can be cleared.
Note:
CM Test
Oscillator
Failure
Due to the wide range of oscillator start-up
times, the Fail-Safe circuit is not active
during oscillator start-up (i.e., after exiting
Reset or Sleep). After an appropriate
amount of time, the user should check the
OSTS bit (OSCCON<3>) to verify the
oscillator start-up and system clock
switchover has successfully completed.
Detected
Failure
CM Test
DS41232B-page 37