PIC12F675-I/SN Microchip Technology, PIC12F675-I/SN Datasheet - Page 71

• Manufacturer Part Number: PIC12F675-I/SN
• Description: IC MCU CMOS FLSH-BASE 8BIT 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F675-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 53270-913
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10.0
The PIC12F629/675 instruction set is highly orthogonal
and is comprised of three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
Each PIC12F629/675 instruction is a 14-bit word
divided into an opcode, which specifies the instruction
type, and one or more operands, which further specify
the operation of the instruction. The formats for each of
the categories is presented in Figure 10-1, while the
various opcode fields are summarized in Table 10-1.
Table 10-2 lists the instructions recognized by the
MPASM
each instruction is also available in the PIC
Range Reference Manual (DS33023).
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator, which selects the bit affected by the
operation, while ‘f’ represents the address of the file in
which the bit is located.
For literal and control operations, ‘k’ represents an 8-
bit or 11-bit constant, or literal value.
One instruction cycle consists of four oscillator periods;
for an oscillator frequency of 4 MHz, this gives a normal
instruction execution time of 1 s. All instructions are
executed within a single instruction cycle, unless a
conditional test is true, or the program counter is
changed as a result of an instruction. When this occurs,
the execution takes two instruction cycles, with the
second cycle executed as a NOP.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.
10.1
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified,
and the result is stored according to either the instruc-
tion, or the destination designator ‘d’. A read operation
is performed on a register even if the instruction writes
to that register.
 2010 Microchip Technology Inc.
Note:
TM
INSTRUCTION SET SUMMARY
Read-Modify-Write Operations
To maintain upward compatibility with
future products, do not use the OPTION
and TRISIO instructions.
assembler. A complete description of
®
Mid-
For example, a CLRF GPIO instruction will read GPIO,
clear all the data bits, then write the result back to
GPIO. This example would have the unintended result
that the condition that sets the GPIF flag would be
cleared.
TABLE 10-1:
FIGURE 10-1:
f
W
b
k
x
d
PC
TO
PD
Field
Byte-oriented file register operations
Bit-oriented file register operations
Literal and control operations
General
CALL and GOTO instructions only
13
13
13
13
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don’t care location (= 0 or 1).
The assembler will generate code with x = 0.
It is the recommended form of use for
compatibility with all Microchip software tools.
Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1.
Program Counter
Time-out bit
Power-down bit
OPCODE
d =
d =
f = 7-bit file register address
b = 3-bit bit address
f = 7-bit file register address
k = 8-bit immediate value
k = 11-bit immediate value
OPCODE
OPCODE
OPCODE
0
1
for destination W
for destination f
PIC12F629/675
11
OPCODE FIELD
DESCRIPTIONS
10
10 9
GENERAL FORMAT FOR
INSTRUCTIONS
8
Description
b (BIT #)
7
d
8
6
7
7 6
k (literal)
DS41190G-page 71
f (FILE #)
k (literal)
f (FILE #)
0
0
0
0