CDB5571 Cirrus Logic Inc, CDB5571 Datasheet - Page 7

• Manufacturer Part Number: CDB5571
• Description: DEV BOARD FOR CS5571 W/MUX
• Manufacturer: Cirrus Logic Inc
• Type: A/Dr

Specifications of CDB5571

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 100k
• Data Interface: Serial
• Inputs Per Adc: 2 Single
• Input Range: 2.4 ~ 4.2 V
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: CS5571
• Product: Data Conversion Development Tools
• Conversion Rate: 100 KSPS
• Resolution: 16 bit
• Maximum Clock Frequency: 16 MHz
• Interface Type: SPI
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): - 2.5 V
• For Use With/related Products: CS5571
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1275; CDB5571-1

SWITCHING CHARACTERISTICS
T
VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V = Low; Logic 1 = VD+ = High; CL = 15 pF.
DS768PP1
Serial Port Timing in SSC Mode (SMODE = VL)
RDY falling to MSB stable
Data hold time after SCLK rising
Serial Clock (Out)
(Note 12, 13)
RDY rising after last SCLK rising
SCLK(o)
A
MCLK
= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;
SDO
RDY
CS
12. SDO and SCLK will be high impedance when CS is high. In some systems SCLK and SDO may require pull-down
13. SCLK = MCLK/2.
resistors.
t
1
Figure 1. SSC Mode - Read Timing, CS remaining low (Not to Scale)
Parameter
MSB
Pulse Width (high)
Pulse Width (low)
MSB–1
t
2
(CONTINUED)
3/25/08
10:56
Symbol
t
3
t
t
t
t
t
1
2
3
4
5
t
4
Min
50
50
-
-
-
LSB+1
LSB
Typ
10
-2
8
-
-
Max
t
5
-
-
-
-
-
CS5571
MCLKs
MCLKs
Unit
ns
ns
ns
7