CDB5571 Cirrus Logic Inc, CDB5571 Datasheet - Page 6

• Manufacturer Part Number: CDB5571
• Description: DEV BOARD FOR CS5571 W/MUX
• Manufacturer: Cirrus Logic Inc
• Type: A/Dr

Specifications of CDB5571

• Number Of Adc's: 1
• Number Of Bits: 16
• Sampling Rate (per Second): 100k
• Data Interface: Serial
• Inputs Per Adc: 2 Single
• Input Range: 2.4 ~ 4.2 V
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: CS5571
• Product: Data Conversion Development Tools
• Conversion Rate: 100 KSPS
• Resolution: 16 bit
• Maximum Clock Frequency: 16 MHz
• Interface Type: SPI
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): - 2.5 V
• For Use With/related Products: CS5571
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1275; CDB5571-1

SWITCHING CHARACTERISTICS
T
VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5%
Input levels: Logic 0 = 0V = Low; Logic 1 = VD+ = High; CL = 15 pF.
6
Master Clock Frequency
Master Clock Duty Cycle
Reset
RST Low Time
RST rising to RDY falling
Conversion
CONV Pulse Width
BP/UP setup to CONV falling
CONV low to start of conversion
Perform Single Conversion (CONV high before RDY falling)
Conversion Time
A
= -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%;
10. BP/UP can be changed coincident to CONV falling. BP/UP must remain stable until RDY falls.
11. If CONV is held low continuously, conversions occur every 160 MCLK cycles.
9. Reset must not be released until the power supplies and the voltage reference are within specification.
If RDY is tied to CONV, conversions will occur every 162 MCLKs.
If CONV is operated asynchronously to MCLK, a conversion may take up to 164 MCLKs.
RDY falls at the end of conversion.
Parameter
Start of Conversion to RDY falling
Internal Oscillator
Internal Oscillator
External Clock
External Clock
3/25/08
10:56
(Note 10)
(Note 11)
(Note 9)
Symbol
t
t
XIN
t
t
t
t
t
f
wup
cpw
bus
buh
scn
scn
res
clk
Min
0.5
12
40
20
1
4
0
-
-
-
-
1536
Typ
120
14
16
-
-
-
-
-
-
-
Max
16.2
164
16
60
2
-
-
-
-
-
-
CS5571
DS768PP1
MCLKs
MCLKs
MCLKs
MCLKs
MCLKs
MHz
MHz
Unit
µs
µs
ns
%