MAX8744ETJ+ Maxim Integrated Products, MAX8744ETJ+ Datasheet - Page 24

• Manufacturer Part Number: MAX8744ETJ+
• Description: IC CNTRLR PWR SUP QUAD 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8744ETJ+

• Applications: Controller, Notebook Computers
• Voltage - Input: 6 ~ 26 V
• Number Of Outputs: 4
• Voltage - Output: 3.3V, 5V, 1 ~ 26 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Duty Cycle (max): 99 %
• Output Voltage: 3.315 V, 5.015 V, 2 V to 5.5 V
• Mounting Style: SMD/SMT
• Switching Frequency: 200 KHz, 300 KHz, 500 KHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Synchronous Pin: No
• Topology: Boost, Flyback, Forward
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High-Efficiency, Quad-Output, Main Power-
Supply Controllers for Notebook Computers
Table 5. Operating Modes Truth Table
inductor node (LX_) quickly switches from ground to V
Applications with high input voltages and long inductive
driver traces may require additional gate-to-source
capacitance to ensure fast-rising LX_ edges do not pull
up the low-side MOSFETs gate, causing shoot-through
currents. The capacitive coupling between LX_ and DL_
created by the MOSFET’s gate-to-drain capacitance
(C
- C
exceed the following minimum threshold.
Lot-to-lot variation of the threshold voltage may cause
problems in marginal designs.
PGOOD_ is the open-drain output of a comparator that
continuously monitors both SMPS output voltages and
the auxiliary LDO output for undervoltage conditions.
PGOOD_ is actively held low in shutdown (SHDN =
GND), standby (ON3 = ON5 = ONA = GND), soft-start,
and soft-shutdown. Once the soft-start sequence termi-
nates, PGOOD_ becomes high impedance as long as
the outputs are above 90% of the nominal regulation volt-
age set by FB_. PGOOD_ goes low once the respective
24
Power-Up
Run
Output Overvoltage
(OVP) Protection
(MAX8744)
Output Undervoltage
Protection (UVP)
Standby
Shutdown
Thermal Shutdown
Switchover Fault
GD
GD
______________________________________________________________________________________
= C
), and additional board parasitics should not
MODE
RSS
), gate-to-source capacitance (C
V
Power-Good Output (PGOOD_)
GS TH
(
)
>
LDO5 < UVLO threshold
SHDN = high, ON3 or ON5 enabled
Either output > 111% of nominal level
Either output < 70% of nominal level,
UVP is enabled 6144 clock cycles
(1/f
ON5 and ON3 < startup threshold,
SHDN = high
SHDN = low
T
Excessive current on LDO5 switchover
transistors
J
V
IN
> +160°C
OSC
⎛
⎜
⎝
C
C
) after the output is enabled
RSS
ISS
⎞
⎟
⎠
CONDITION
GS
= C
ISS
IN
.
output drops 10% below its nominal regulation point, an
SMPS output overvoltage fault occurs, or ON_ or SHDN
is low. For a logic-level PGOOD_ output voltage, connect
an external pullup resistor between PGOOD_ and LDO5.
A 100kΩ pullup resistor works well in most applications.
If the output voltage of either SMPS rises above 111% of
its nominal regulation voltage and the OVP protection is
enabled, the controller sets the fault latch, pulls PGOOD
low, shuts down the SMPS controllers that tripped the
fault, and immediately pulls DH_ low and forces DL_
high. This turns on the synchronous-rectifier MOSFETs
with 100% duty, rapidly discharging the output capaci-
tors and clamping both outputs to ground. However,
immediately latching DL_ high typically causes slightly
negative output voltages due to the energy stored in the
output LC at the instant the OVP occurs. If the load can-
not tolerate a negative voltage, place a power Schottky
diode across the output to act as a reverse-polarity
clamp. If the condition that caused the overvoltage per-
sists (such as a shorted high-side MOSFET), the battery
blows. The other output is shut down using the soft-shut-
down sequence. Cycle LDO5 below 1V or toggle either
Transitions to discharge mode after V
becomes valid. LDO5, REF remain active. DL_ is active
(high).
Normal operation.
Exited by POR or cycling SHDN, ON3, or ON5.
Exited by POR or cycling SHDN, ON3, or ON5.
DL_ stays high. LDO5 active.
All circuitry off.
Exited by POR or cycling SHDN, ON3, or ON5.
DL3 and DL5 go high before LDO5 turns off. They remain
high as long as possible thereafter.
Exited by POR or cycling SHDN, ON3, or ON5.
Output Overvoltage Protection (OVP)—
COMMENT
IN
Fault Protection
POR and after REF
MAX8744 Only