MAX8770GTL+T Maxim Integrated Products, MAX8770GTL+T Datasheet - Page 46

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MAX8770GTL+T

Manufacturer Part Number
MAX8770GTL+T
Description
IC CTLR PS 2/1PH QUICK PWM 40QFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8770GTL+T

Applications
Controller, Intel IMVP-6
Voltage - Input
4 ~ 26 V
Number Of Outputs
1
Voltage - Output
0.125 ~ 1.5 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PWM Controller for IMVP-6+ CPU Core Power Supplies
5) CSP_ and CSN_ connections for current limiting and
6) When trade-offs in trace lengths must be made, it is
7) Route high-speed switching nodes away from sensi-
Place the power components first, with ground terminals
adjacent (low-side MOSFET source, C
anode). If possible, make all these connections on the top
layer with wide, copper-filled areas:
Mount the controller IC adjacent to the low-side MOSFET.
The DL gate traces must be short and wide (50 mils to 100
mils wide if the MOSFET is 1in from the controller IC).Group
the gate-drive components (BST capacitors, V
capacitor) together near the controller IC.
CONFIDENTIAL INFORMATION – RESTRICTED TO INTEL
46
power MOSFETs that require low-impedance gate
drivers to avoid shoot-through currents.
voltage positioning must be made using Kelvin-sense
connections to guarantee the current-sense accuracy.
preferable to allow the inductor charging path to be
made longer than the discharge path. For example, it
is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-side
MOSFET or between the inductor and the output filter
capacitor.
tive analog areas (REF, CCV, CCI, FB, CSP_, CSN_,
etc.).
______________________________________________________________________________________
TOP VIEW
DPRSLPVR
MAX8770/MAX8771/MAX8772 Dual-Phase, Quick-
DPRSTP
SHDN
A "+" SIGN REPLACES THE FIRST PIN INDICATOR ON LEAD-FREE PACKAGES.
D0
D1
D2
D3
D4
D5
D6
31
32
33
34
35
36
37
38
39
40
30
1
29
2
28
3
6mm x 6mm
27
4
THIN QFN
MAX8770
MAX8772
26
5
Layout Procedure
25
6
24 23 22
7
IN
8
, C
9
OUT
10
DD
21
, and D1
20
19
18
17
16
15
14
13
12
11
bypass
BST2
V
CSP1
CSN1
CSN2
CSP2
GNDS
FB
REF
GND
CC
TOP VIEW
Make the DC-DC controller ground connections as shown
in the Standard Application Circuits. This diagram can be
viewed as having four separate ground planes: input/out-
put ground, where all the high-power components go; the
power ground plane, where the PGND pin and V
bypass capacitor go; the master’s analog ground plane
where sensitive analog components, the master’s GND
pin, and V
ground plane where the slave’s GND pin and V
capacitor go. The master’s GND plane must meet the
PGND plane only at a single point directly beneath the IC.
Similarly, the slave’s GND plane must meet the PGND
plane only at a single point directly beneath the IC. The
respective master and slave ground planes should con-
nect to the high-power output ground with a short metal
trace from PGND to the source of the low-side MOSFET
(the middle of the star ground). This point must also be
very close to the output capacitor ground terminal.
Connect the output power planes (V
ground planes) directly to the output filter capacitor
positive and negative terminals with multiple vias. Place
the entire DC-DC converter circuit as close to the CPU
as is practical.
TRANSISTOR COUNT: 8990
PROCESS: BiCMOS
DPRSLPVR
DPRSTP
SHDN
D0
D1
D2
D3
D4
D5
D6
31
32
33
34
35
36
37
38
39
40
CC
30
1
bypass capacitor go; and the slave’s analog
29
2
28
3
6mm x 6mm
27
4
THIN QFN
MAX8771
®
26
5
IMVP-6 LICENSEES
25
6
Pin Configurations
24 23 22
Chip Information
7
8
9
10
21
CORE
20
19
18
17
16
15
14
13
12
11
BST2
V
PHASEGD
CSP1
CSN12
CSP2
GNDS
FB
REF
GND
CC
and system
CC
bypass
DD

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