ADE7756ARS Analog Devices Inc, ADE7756ARS Datasheet - Page 14

• Manufacturer Part Number: ADE7756ARS
• Description: IC ENERGY METERING 1PHASE 20SSOP
• Manufacturer: Analog Devices Inc

Specifications of ADE7756ARS

• Rohs Status: RoHS non-compliant
• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 3mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• Lead Free Status / RoHS Status: Not Compliant

LINE VOLTAGE SAG DETECTION
In addition to the detection of the loss of the line voltage signal
(zero crossing), the ADE7756 can also be programmed to detect
when the absolute value of the line voltage drops below a certain
peak value, for a number of half-cycles. This condition is illus-
trated in Figure 9.
Figure 9 shows the line voltage fall below a threshold that is set
in the Sag Level register (SAGLVL[7:0]) for nine half-cycles.
Since the Sag Cycle register (SAGCYC[7:0]) contains 06h, the
SAG pin will go active low at the end of the sixth half-cycle for
which the line voltage falls below the threshold, if the DISSAG
bit in the Mode register is Logic 0. As is the case when zero-
crossings are no longer detected, the sag event is also recorded
by setting the SAG flag in the Interrupt Status register. If the
SAG enable bit is set to Logic 1, the IRQ logic output will go
active low—see ADE7756 Interrupts section.
The SAG pin will go logic high again when the absolute value
of the signal on Channel 2 exceeds the sag level set in the Sag
Level register. This is shown in Figure 9 when the SAG pin goes
high during the tenth half-cycle from the time when the signal
on Channel 2 first dropped below the threshold level.
Sag Level Set
The contents of the Sag Level register (1 byte) are compared to
the absolute value of the most significant byte output from
LPF1, after it is shifted left by one bit. Thus for example the
nominal maximum code from LPF1 with a full scale signal on
Channel 2 is 1C396h or (0001, 1100, 0011, 1001, 0110b)—see
Channel 2 Sampling section. Shifting one bit left will give 0011,
ADE7756
FULL SCALE
SAGLVL[7:0]
SAG
SAGCYC[7:0] = 06H
6 HALF-CYCLES
CHANNEL 2
SAG RESET HIGH
WHEN CHANNEL 2
EXCEEDS SAGLVL[7:0]
1000, 0111, 0010, 1100b or 3872Ch. Therefore writing 38h to
the Sag Level register will put the sag detection level at full
scale. Writing 00h will put the sag detection level at zero. The
Sag Level register is compared to the most significant byte of a
waveform sample after the shift left and detection is made when
the contents of the sag level register are greater.
POWER SUPPLY MONITOR
The ADE7756 also contains an on-chip power supply monitor.
The Analog Supply (AV
ADE7756. If the supply is less than 4 V ± 5%, the ADE7756 will
be inactive, i.e., no energy will accumulate regardless of the
input signals at Channel 1 and Channel 2. This is useful to ensure
correct device operation at power-up and during power-down.
The power supply monitor has built-in hysteresis and filtering.
This gives a high degree of immunity to false triggering due to
noisy supplies.
As can be seen from Figure 10, the trigger level is nominally set
at 4 V. The tolerance on this trigger level is about ± 5%. The
SAG pin can also be used as a power supply monitor input to
the MCU. The SAG pin will go logic low when the ADE7756 is
reset. The power supply and decoupling for the part should
be such that the ripple at AV
specified for normal operation.
POWER-ON
ADE7756
RESET
AV
SAG
DD
5V
4V
0V
DD
) is continuously monitored by the
ACTIVE
TIME
DD
does not exceed 5 V ± 5% as
INACTIVE