DS2151QNB+ Maxim Integrated, DS2151QNB+ Datasheet - Page 33

• Manufacturer Part Number: DS2151QNB+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2151QNB+

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 2.048 Mbps
• Supply Current (max): 65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 5 V
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.75 V
• Part # Aliases: 90-2151Q+NB0

TS1 TO TS12: TRANSMIT SIGNALING REGISTERS (Address = 70 to 7B Hex)
Each Transmit Signaling Register (TS1 to TS12) contains the Robbed-Bit signaling for eight DS0
channels that will be inserted into the outgoing stream if enabled to do so via TCR1.4. In the ESF framing
mode, there can be up to 4 signaling bits per channel (A, B, C, and D). On multiframe boundaries, the
DS2151Q will load the values present in the Transmit Signaling Register into an outgoing signaling shift
register that is internal to the device. The user can utilize the Transmit Multiframe Interrupt in Status
Register 2 (SR2.6) to know when to update the signaling bits. In the ESF framing mode, the interrupt will
come every 3ms and the user has a full 3ms to update the TSRs. In the D4 framing mode, there are only 2
framing bits per channel (A and B). However in the D4 framing mode, the DS2151Q uses the C and D bit
positions as the A and B bit positions for the next multiframe. The DS2151Q will load the values in the
TSRs into the outgoing shift register every other D4 multiframe.
A/C(16)
A/C(24)
B/D(16)
B/D(24)
(MSB)
A/C(8)
B/D(8)
A(16)
A(24)
B(16)
B(24)
A(8)
B(8)
SYMBOL
D(24)
A(1)
A/C(15)
A/C(23)
B/D(15)
B/D(23)
A/C(7)
B/D(7)
A(15)
A(23)
B(15)
B(23)
A(7)
B(7)
A/C(14)
A/C(22)
B/D(14)
B/D(22)
A/C(6)
B/D(6)
A(14)
A(22)
B(14)
B(22)
A(6)
B(6)
POSITION
TS12.7
TS1.0
A/C(13)
B/D(13)
B/D(21)
A/C(5)
A/C(1)
B/D(5)
A(13)
A(21)
B(13)
B(21)
A(5)
B(5)
A/C(12)
A/C(20)
B/D(12)
B/D(20)
A/C(4)
B/D(4)
NAME AND DESCRIPTION
Signaling Bit D in Channel 24
Signaling Bit A in Channel 1
A(12)
A(20)
B(12)
B(20)
A(4)
B(4)
33 of 60
A/C(11)
A/C(19)
B/D(11)
B/D(19)
A/C(3)
B/D(3)
A(11)
A(19)
B(11)
B(19)
A(3)
B(3)
A/C(10)
A/C(18)
B/D(10)
B/D(18)
A/C(2)
B/D(2)
A(10)
A(18)
B(10)
B(18)
A(2)
B(2)
A/C(17)
B/D(17)
A/C(1)
A/C(9)
B/D(1)
B/D(9)
(LSB)
A(17)
B(17)
A(1)
A(9)
B(1)
B(9)
TS11 (7A)
TS12 (7B)
TS10 (79)
TS1 (70)
TS2 (71)
TS3 (72)
TS4 (73)
TS5 (74)
TS6 (75)
TS7 (76)
TS8 (77)
TS9 (78)