DS2151QNB+ Maxim Integrated, DS2151QNB+ Datasheet - Page 13

• Manufacturer Part Number: DS2151QNB+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2151QNB+

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 2.048 Mbps
• Supply Current (max): 65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 5 V
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.75 V
• Part # Aliases: 90-2151Q+NB0

TCR2: TRANSMIT CONTROL REGISTER 2 (Address = 36 Hex)
Table 4-1. Output Pin Test Modes
TEST1
(MSB)
TEST1
SYMBOL
TD4YM
TZBTSI
TEST1
TEST0
TSDW
0
0
1
1
B7ZS
TSIO
TSM
TEST0
TEST0
0
1
0
1
POSITION
XTCR2.0
TCR2.7
TCR2.6
TCR2.5
TCR2.4
TCR2.3
TCR2.2
TCR2.1
TZBTSI
Operate normally
Force all output pins tri-state (including all I/O pins and parallel port pins)
Force all output pins low (including all I/O pins except parallel port pins)
Force all output pins high (including all I/O pins except parallel port pins)
NAME AND DESCRIPTION
Test Mode Bit 1 for Output Pins. See
Test Mode Bit 0 for Output Pins. See
Transmit Side ZBTSI Enable.
0 = ZBTSI disabled
1 = ZBTSI enabled
TSYNC Double-Wide. (Note: This bit must be set to 0 when
TCR2.3 = 1 or when TCR2.2 = 0.)
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
TSYNC Mode Select.
0 = frame mode (see the timing in Section 14)
1 = multiframe mode (see the timing in Section 14)
TSYNC I/O Select.
0 = TSYNC is an input
1 = TSYNC is an output
Transmit Side D4 Yellow Alarm Select.
0 = 0s in bit 2 of all channels
1 = 1 in the S-bit position of frame 12
Bit 7 Zero Suppression Enable.
0 = No stuffing occurs
1 = Bit 7 force to a 1 in channels with all 0s
TSDW
13 of 60
EFFECT ON OUTPUT PINS
TSM
TSIO
Table
Table
TD4YM
4-1.
4-1.
(LSB)
B7ZS