DS2151QNB+ Maxim Integrated, DS2151QNB+ Datasheet - Page 10

• Manufacturer Part Number: DS2151QNB+
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS2151QNB+

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 2.048 Mbps
• Supply Current (max): 65 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-44
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 5 V
• Supply Voltage - Max: 5.25 V
• Supply Voltage - Min: 4.75 V
• Part # Aliases: 90-2151Q+NB0

4 CONTROL REGISTERS
The operation of the DS2151Q is configured via a set of eight registers. Typically, the control registers
are only accessed when the system is first powered up. Once the DS2151Q has been initialized, the
control registers will only need to be accessed when there is a change in the system configuration. There
are two Receive Control Registers (RCR1 and RCR2), two Transmit Control Registers (TCR1 and
TCR2), a Line Interface Control Register (LICR), and three Common Control Registers (CCR1, CCR2,
and CCR3). Seven of the eight registers are described below. The LICR is described in Section 13.
RCR1: RECEIVE CONTROL REGISTER 1 (Address = 2B Hex)
LCVCRF
(MSB)
SYMBOL
LCVCRF
RESYNC
SYNCC
SYNCT
SYNCE
OOF1
OOF2
ARC
ARC
POSITION
RCR1.7
RCR1.6
RCR1.5
RCR1.4
RCR1.3
RCR1.2
RCR1.1
RCR1.0
OOF1
NAME AND DESCRIPTION
Line Code Violation Count Register Function Select.
0 = do not count excessive 0s
1 = count excessive 0s
Auto Resync Criteria.
0 = Resync on OOF or RCL event
1 = Resync on OOF only
Out Of Frame Select 1.
0 = 2/4 frame bits in error
1 = 2/5 frame bits in error
Out Of Frame Select 2.
0 = follow RCR1.5
1 = 2/6 frame bits in error
Sync Criteria.
In D4 Framing Mode
0 = search for Ft pattern, then search for Fs pattern
1 = cross couple Ft and Fs pattern
In ESF Framing Mode
0 = search for FPS pattern only
1 = search for FPS and verify with CRC6
Sync Time.
0 = qualify 10 bits
1 = qualify 24 bits
Sync Enable.
0 = auto resync enabled
1 = auto resync disabled
Resync. When toggled from low to high, a resynchronization
of the receive side framer is initiated. Must be cleared and set
again for a subsequent resync.
OOF2
10 of 60
SYNCC
SYNCT
SYNCE
RESYNC
(LSB)