DS2151QNB+ Maxim Integrated, DS2151QNB+ Datasheet - Page 21

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DS2151QNB+

Manufacturer Part Number
DS2151QNB+
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS2151QNB+

Product
Framer
Number Of Transceivers
1
Data Rate
2.048 Mbps
Supply Current (max)
65 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
PLCC-44
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
5 V
Supply Voltage - Max
5.25 V
Supply Voltage - Min
4.75 V
Part # Aliases
90-2151Q+NB0
RIR2: RECEIVE INFORMATION REGISTER 2 (Address = 31 Hex)
Table 5-1. Receive T1 Level Indication
RL1
(MSB)
0
0
1
1
RL1
SYMBOL
TSLIP
RPDV
TPDV
TESF
TESE
JALT
RL1
RL0
RL0
0
1
0
1
RL0
TYPICAL LEVEL
RECEIVED (dB)
POSITION
Less than -22.5
RIR2.7
RIR2.6
RIR2.5
RIR2.4
RIR2.3
RIR2.2
RIR2.1
RIR2.0
-15 to -22.5
-7.5 to -15
+2 to -7.5
TESF
NAME AND DESCRIPTION
Receive Level Bit 1. See
Receive Level Bit 0. See
Transmit Elastic Store Full. Set when the transmit elastic
store buffer fills and a frame is deleted.
Transmit Elastic Store Empty. Set when the transmit elastic
store buffer empties and a frame is repeated.
Transmit Elastic Store Slip Occurrence. Set when the
transmit elastic store has either repeated or deleted a frame.
Jitter Attenuator Limit Trip. Set when the jitter attenuator
FIFO reaches to within 4 bits of its limit; useful for debugging
jitter attenuation operation.
Receive Pulse Density Violation. Set when the receive data
stream does not meet the ANSI T1.403 requirements for pulse
density.
Transmit Pulse Density Violation. Set when the transmit data
stream does not meet the ANSI T1.403 requirements for pulse
density.
TESE
21 of 60
TSLIP
Table
Table
JALT
5-1.
5-1.
RPDV
(LSB)
TPDV

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