MAX9257AGCM+ Maxim Integrated, MAX9257AGCM+ Datasheet - Page 41

• Manufacturer Part Number: MAX9257AGCM+
• Description: Serializers & Deserializers - Serdes Prog Serializer / Deserializer
• Manufacturer: Maxim Integrated
• Type: Serializerr

Specifications of MAX9257AGCM+

• Rohs: yes
• Data Rate: 840 Mbit/s
• Input Type: LVCMOS
• Output Type: LVDS
• Number Of Inputs: 18
• Number Of Outputs: 1
• Operating Supply Voltage: 1.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.71 V, 3 V

The devices have built-in circuits for testing bit errors
on the serial link. The MAX9257A has a PRBS generator
and the MAX9258A has a PRBS checker. The length of
the PRBS pattern is programmable from 221 to 235 word
length or continuous by programming REG9[7:4] in the
MAX9257A. In case of errors, errors are counted in the
MAX9258A PRBSERR register (REG12), and the ERROR
output on the MAX9258A goes low. To start the test, the
ECU writes a 1 to PRBSEN bit of both the MAX9257A
and the MAX9258A. The PRBS test can be performed
with or without spread spectrum. If the PRBS test is
programmed to run continuously, the MAX9257A must
be powered down to stop the test. When pro grammed
for a finite number of repetitions, the control channel is
enabled after the PRBS test finishes and serialization
enable (SEREN) is reset to 0. To start nor mal operation,
the ECU must disable PRBSEN and enable SEREN.
Parity protection of video data is programmable for par-
allel-word widths of 16 bits or less. When programmed,
two parity bits are appended to each parallel word
latched into the MAX9257A. In the MAX9258A, a 16-bit
parity error counter logs parity errors. The ERROR out-
put on the MAX9258A goes low if parity errors exceed a
programmable threshold.
Table 32. Maximum Data Rate at Different
Input Offset Settings
OFFSET BITS
(REG1[4:3)
00
01
10
11
Applications Information
TYPICAL INPUT
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OFFSET (mV)
Fully Programmable Serializer/Deserializer
23
11
59
75
Video Data Parity
FREQUENCY (Mbps)
MAXIMUM
PRBS Test
780
940
520
400
with UART/I
Most applications use the default activity-detector set-
tings. If there is excessive noise on the link when the link
is not driven (during control channel mode), increase
the activity-detector offset to filter out noise amplitudes.
Using a larger offset threshold affects the maximum data
rate available.
data rate at different input offset settings for a 150mV
peak input signal.
AC-coupling increases the input voltage of the LVDS
receiver to the voltage rating of the capacitor. Two from
18MHz to 42MHz capacitors are sufficient for isolation,
but four capaci tors—two at the serializer output and two at
the deseri alizer input—provide protection if either end of
the cable is shorted to a high voltage. AC-coupling blocks
low-frequency ground shifts and common-mode noise.
See
AC-coupling depending on the parallel clock frequency.
The plot shows minimum capacitor values for two- and
four-capacitor-per-link systems. To block the highest
common-mode frequency shift, choose the minimum
capacitor value shown in
capacitors are sufficient.
Figure 31. AC-Coupling Capacitor Values vs. Clock Frequency
from 18MHz to 42MHz
Figure 31
MAX9257A/MAX9258A
Selection of AC-Coupling Capacitors
2
60
40
20
0
C Control Channel
Table 32
360
for calculating the capacitor values for
AC-COUPLING CAPACITOR VALUE
TWO CAPACITORS PER LINK
420
vs. SERIAL-DATA RATE
480
SERIAL-DATA RATE (Mbps)
FOUR CAPACITORS PER LINK
lists the maximum recommended
540
Figure
AC-Coupling Benefits
600
660
Activity Detector
31. In general, 0.1FF
720
780
840